【作者】 张帅；

【导师】 陈力颖； 吕英杰；

【作者基本信息】 天津工业大学 ， 电子信息（专业学位）， 2025， 硕士

【摘要】 RFID技术是一种非接触式自动识别技术,通过射频信号自动识别目标并获取相关数据,识别过程无需人工干预,并且不受环境限制。RFID技术主要由阅读器和标签两部分组成。其中阅读器用于向标签提供能量,发送指令并收集标签信息。标签主要分为有源标签、半有源标签和无源标签,其中无源标签由天线和芯片组成,其内部通常带有唯一识别码,并根据阅读器指令完成相关操作。无源标签具有成本低、易管理和方便携带的优点,适用于零售、物流等其他行业的大规模应用。为此,本文设计并研究了一种无源标签芯片数字基带,采用全新设计架构,功耗极低,并通过原型验证。本文主要研究内容和结果如下:1.基于EPC C1G2空中接口协议,设计了全新数字基带整体架构和具体模块划分,将阅读器指令分为两大类:通信指令与数据指令,根据阅读器指令不同选择不同指令处理模块进行命令执行,并对编解码模块也进行了特殊架构设计,并完成全部模块RTL设计与时序仿真验证,包括CRC校验、编解码、指令处理、存储器控制等模块。2.根据RFID标签的空中通信方式,设计了一个应用于UHF RFID通信的FPGA原型验证平台,利用FPGA可重复编程、迭代速度快等特点,利用商用阅读器配合外围反向散射解调电路成功捕获商用阅读器与验证平台的通信过程,验证平台能够正确解码、处理阅读器指令和返回自身信息。3.针对无源RFID标签进行超低功耗设计,使用多种低功耗设计方法,如使模块按照数据流启动和关闭、时钟分频、异步解码和串行读出等方式,对比非低功耗设计,功耗显著降低,仅为2.8uw,物理版图长宽为160um*310um,标签芯片接收灵敏度为-20d Bm,从面积和功耗上均显著优于同类型数字基带,并通过DRC与LVS验证,符合流片标准。本文研究成果为无源UHF RFID标签芯片低功耗设计提供了新途径,具有重要理论意义和应用价值。未来可从优化工艺制程、提升抗干扰能力、增强防碰撞算法等方面进一步深入研究,推动RFID技术在物联网、智能仓储等领域的广泛应用。更多还原

【Abstract】 RFID technology is a non-contact automatic identification technology,through the radio frequency signal automatically identify the target and obtain the relevant data,the identification process without human intervention,and is not subject to environmental restrictions.RFID technology is mainly composed of two parts:the reader and the tag.The reader is used to provide energy to the tag,send commands and collect tag information.Tags are mainly divided into active tags,semi-active tags and passive tags,of which passive tags are composed of antennas and chips,usually with a unique identification code inside,and according to the reader instructions to complete the relevant operations.Passive tags have the advantages of low cost,easy to manage and portable,and are suitable for large-scale applications in other industries such as retail and logistics.To this end,this paper designs and researches a passive tag chip digital baseband with a new design architecture and extremely low power consumption,and passes the prototype verification.The main research content and results of this paper are as follows:1.Based on the EPC C1G2 air interface protocol,we designed a new digital baseband overall architecture and specific module division,classified the reader commands into two categories:communication commands and data commands,selected different command processing modules for command execution according to different reader commands,and also carried out a special architectural design of the codec module,and completed the RTL design of all the modules and timing simulation verification,including CRC We have completed the RTL design and timing simulation verification of all modules,including CRC,codec,command processing,memory control and other modules.2.According to the air communication mode of RFID tags,an FPGA prototype verification platform applied to UHF RFID communication is designed,utilizing the features of repeatable programming and fast iteration speed of FPGAs,and utilizing the commercial reader with peripheral modulation and demodulation circuits to successfully capture the communication process between the commercial reader and the verification platform,and verify that the platform is able to correctly decode and process the commands of the reader and return the information of the platform itself.The verification platform can correctly decode and process the commands of the reader and return its own information.3.Ultra-low power design for passive RFID tags,using a variety of low-power design methods,such as making the module according to the data flow start and shutdown,clock frequency division,asynchronous decoding and serial readout,compared with non-low-power design,the power consumption is significantly reduced to only 2.8uw,the physical layout length and width of 160um*310um,the tag chip receiving sensitivity of-20d Bm,from the area and power consumption are significantly better than the same type of digital baseband,and through the DRC and LVS validation to meet the standards of the flow.It is significantly better than the same type of digital baseband in terms of area and power consumption,and has been verified by DRC and LVS and meets the standards for flow-through chips.The research results of this project provide a new way for the low-power design of passive UHF RFID tag chip,which has important theoretical significance and application value.In the future,further in-depth research can be carried out in terms of optimizing the process,improving the anti-jamming ability,enhancing the anti-collision algorithm,etc.,so as to promote the wide application of RFID technology in the fields of Internet of Things and intelligent warehousing.更多还原