【作者】 张阳；

【导师】 陈伟平；

【作者基本信息】 哈尔滨工业大学 ， 电子科学与技术， 2025， 硕士

【摘要】 当前无线通信技术的快速发展,多标准通信系统大范围普及,5G通信技术现今阶段已实现规模化应用,广泛渗透于在日常生活场景中。无线接收机的发展路径呈现出集成化、轻便型及经济化的明显特征。在整个信号收发机工作中,位于射频前端的滤波器对无用信号的滤除起着重要作用,影响整个系统的性能。对高性能可调谐滤波器的需求日益迫切。传统的声表面波和体声波滤波器有着良好的噪声性能,但其占用空间多、集成难度高、造价昂贵和固定频段的缺点,迫切的需要寻找一种优化方案。N-path滤波器作为一种新型集成滤波器结构,凭借其无电感设计、中心频率与时钟同步可调、高集成度等优势,成为当前研究热点。在理论分析方面,本研究深入探讨了N-path滤波器的工作原理,建立了完整的数学模型。基于其工作机理,将输入高频信号转换至低频域进行分析,推导出传递函数表达式。同时针对N-path结构固有的谐波干扰和带外抑制低等问题,提出了双开关结构和相位合成技术,使得滤波器偶次谐波及三次谐波得到抑制。在原型转换原理的基础上,系统性地阐述了高阶N-path滤波器的设计过程。对于滤波器的电路实现,两款滤波器均采用6路结构,以消除偶次谐波及三次谐波。第一款滤波器工作在中心频率50～100MHz。采用差分N-path单元结合有源回转器结构,实现了1～30MHz带宽可调。第二款滤波器工作于中心频率300～600MHz的P波段,实现100～200MHz带宽调节。两款滤波器结构中均包含谐波抑制N-path单元、低通滤波单元和时钟发生电路等模块。为了确保电路能在不同的温度下正常工作,需要设计电源无关的电流源以及线性稳压器,同时N-path结构的工作依赖于六相时钟。因此,设计了基于65nm SOI CMOS工艺的全MOS电压源基准,在TT工艺下仿真温度系数为50ppm/°C,与温度无关的基准为LDO提供参考电压标准,保证LDO的正常工作。LDO带电阻载上限约为200Ω,线性调整率为0.00027%/V。对六相时钟的仿真结果表明电路可以在1.8GHz～3.6GHz Hz的输入时钟下正常工作。设计的两款N-path带通滤波器,分别面向中频段和P波段应用需求。仿真结果表明,在2.5V工作电压下,P波段滤波器可实现80～322MHz带宽调节,大于10d B的增益,1d B压缩点达-2d Bm,功耗为94.31m A,带外抑制超过40d Bc。中频段滤波器增益与带外衰减与P波段滤波器基本一致,带宽在0.67～37MHz可调,1d B压缩点为-1d Bm,功耗仅47.25m A。两款滤波器均通过完整的版图设计和后仿真验证。通过流片加工及实际测试验证:中频段滤波器中心频率在50～100MHz内连续可调,带宽在0.88～31.58MHz可调;P波段滤波器中心频率在300～600MHz内连续可调,带宽在80～247MHz可调。更多还原

【Abstract】 At present,with the rapid development of wireless communication technology and the wide popularization of multi standard communication systems,5g communication technology has achieved large-scale application at this stage and is widely used in daily life scenes.The development path of wireless receiver presents the obvious characteristics of integration,portability and economy.In the operation of the whole transceiver,the filter located at the front end of the RF plays an important role in filtering out useless signals,which affects the performance of the whole system.The demand for high performance tunable filters is increasingly urgent.Traditional saw and bulk acoustic wave filters have good noise performance,but they have the disadvantages of large space occupation,high integration difficulty,high cost and fixed frequency band,so it is urgent to find an optimization scheme.As a new type of integrated filter structure,N-path filter has become a research hotspot due to its advantages such as no inductance design,adjustable center frequency and clock synchronization,and high integration.In the aspect of theoretical analysis,this study deeply discusses the working principle of N-path filter and establishes a complete mathematical model.Based on its working mechanism,the input high-frequency signal is converted to the low-frequency domain for analysis,and the transfer function expression is derived.At the same time,aiming at the inherent harmonic interference and low out of band suppression of the N-path structure,a dual switch structure and phase synthesis technology are proposed to suppress the even and third harmonics of the filter.Based on the principle of prototype conversion,the design process of high-order N-path filter is systematically described.For the circuit implementation of the filter,both filters adopt 6-way structure to eliminate even and third harmonics.The first filter operates at the center frequency of50～100MHz.Using the differential N-path unit and active gyrator structure,the1～30MHz bandwidth can be adjusted.The second filter works in the P-band with the center frequency of 300～600MHz,realizing the bandwidth adjustment of 100～200MHz.The two filter structures include harmonic suppression N-path unit,low-pass filter unit,clock generation circuit and other modules.In order to ensure that the circuit can work normally at different temperatures,it is necessary to design a power independent current source and a linear voltage regulator.At the same time,the operation of the N-path structure depends on the six phase non overlapping clock.Therefore,an all MOS voltage source reference based on 65nm SOI CMOS process is designed.The simulation temperature coefficient is 50ppm/°C in TT process.The temperature independent reference provides a reference voltage standard for LDO to ensure the normal operation of LDO.The maximum resistance load of LDO is about 200Ω,and the linear adjustment rate is 0.00027%/v.the simulation results of six phase non overlapping clock show that the circuit can work normally under the input clock of 1.8GHz～3.6 GHz.Two types of N-path band-pass filters are designed to meet the requirements of medium band and P-band applications,respectively.The simulation results show that under the working voltage of 2.5V,the P-band filter can achieve bandwidth adjustment of 80～322 MHz,gain greater than 10d B,1d B compression point of-2d Bm,power consumption of 94.31m A,and out of band suppression of more than 40dbc.The gain and out of band attenuation of the intermediate frequency band filter are basically the same as those of the P-band filter.The bandwidth is adjustable from 0.67 MHz to 37MHz,the1d B compression point is-1dbm,and the power consumption is only 47.25m A.Both filters have passed the complete layout design and post simulation verification.The center frequency of the intermediate frequency band filter is continuously adjustable within50～100MHz,and the bandwidth is adjustable within 0.88～31.58 MHz;The center frequency of the P-band filter is continuously adjustable in the range of 300～600MHz,and the bandwidth is adjustable in the range of 80～247 MHz.更多还原