【作者】 王鹏；

【导师】 赵明华；

【作者基本信息】 电子科技大学 ， 电子信息（专业学位）， 2023， 硕士

【摘要】 W波段有源相控阵雷达由于其高分辨率、灵活的波束扫描和多目标监测能力等优势,已成为毫米波领域的主要研究热点。目前,我国对W波段有源相控阵雷达研究与报道相对较少,因此本文基于W波段单通道T/R裸芯片、4T/4R裸芯片并结合键合线(WB)互连技术与多层印刷电路板(PCB)技术展开COB(Chip On Board)芯片封装设计以及平面集成有源相控阵收发前端研究。主要研究工作如下:首先,对W波段接地共面波导(CPWG)-基片集成波导(SIW)过渡结构进行了研究,并将键合线技术用于其中,设计了一种在90-98GHz频率范围内插入损耗小于1.4d B、回波损耗大于15d B的Chip-WB-CPWG-SIW的过渡结构。通过SIW缝隙天线与该过渡结构进行集成,研制了平面集成单通道发射前端。实测结果表明在92-94GHz频带范围内,等效全向辐射功率(EIRP)最高可达27.3d Bm。其次,基于多层PCB技术进行了Ku波段层间过渡结构仿真设计、一分八功分网络仿真设计以及DC-50MHz链式功合网络设计。随后将这些设计结构与W波段SIW双极化缝隙天线阵、W波段Chip-WB-CPWG-SIW过渡结构相结合,进行了平面集成相控阵收发前端设计。测试结果表明相控阵接收前端在92-94GHz范围内,单通道变频增益最高可达24d B,单个极化四个通道全开时,变频增益最高可达28d B,但由于芯片移相器的部分损坏或者移相误差大,最终仅测得了15°的扫描范围。相控阵发射前端在91.5-93.5GHz范围内,EIRP最高可达34.8d Bm,同时可实现±50°的波束扫描范围,且在扫描角度达到±50°时,增益降低值小于2d B。最后,针对多通道T/R芯片中由于通道距离较近而易出现的电磁耦合和串扰问题,基于金丝键合对其进行了COB封装设计,射频仿真性能如下:在78-98GHz范围内,回波损耗大于12d B,插入损耗小于1.5d B,幅度差小于0.8d B,相差小于4°,隔离度大于25d B。同时引入了CPWG扇出以及CPWG-矩形波导(RWG)过渡模型,进行4T/4R芯片整体封装模块以及背靠背结构设计与加工。测试结果验证了该芯片封装设计的可行性与其优良性能,相关结构可用于多通道芯片封装以及相控阵系统中。更多还原

【Abstract】 Research into W-band active phased array radar has become a major focus in millimeter wave due to its high resolution,flexible beam scanning,and capacity to monitor multiple objectives,etc.Currently,there are relatively few research and reports on W-band active phased array radars in China.Hence,this thesis is founded on W-band single channel T/R bare chips,4T/4R bare chips,coupled with bonding wire(WB)interconnection technology and multi-layer printed circuit board(PCB)technology to execute COB(Chip On Board)chip packaging design and planar integrated phased array receiver transceiver front-end research.The main research work is as follows:Firstly,the WB technology was applied to the transition structure of W-band grounded coplanar waveguide(CPWG)to substrate integrated waveguide(SIW).Subsequently,a Chip-WB-CPWG-SIW transition structure was designed,with insertion loss of less than 1.4 d B and return loss of more than 15 d B in the frequency range of 90-98 GHz.By integrating the SIW slot antenna with the transition structure,a planar integrated single channel transmitter front-end has been developed.The measured results show that the equivalent omnidirectional radiation power(EIRP)of the single channel transmitter front-end can reach up to 27.3 d Bm in the 92-94 GHz frequency band range.Secondly,based on multi-layer PCB technology,the Ku band interlayer transition structure simulation design,the one-eighth power division network simulation design,and the DC-50 MHz chain power combination network design were carried out.Then,combining these design structures with the W-band SIW dual polarization slot antenna array and the W-band Chip-WB-CPWG-SIW transition structure,a planar integrated phased array transceiver front-end were developed.The test results show that the frequency conversion gain of the phased array receiver can reach up to 24 d B for a single channel in the range of 92-94 GHz,and the maximum frequency conversion gain can reach up to 28 d B when the four channels of a single polarization are fully open.At the same time,the simulation results are in good agreement with the measured directional pattern results,but due to partial damage or large phase shifting error of the chip phase shifter,only a 15 ° scanning range was measured.The Phased array transmitters have an EIRP of up to 34.8 d Bm in the 91.5-93.5 GHz,while achieving a beam scanning range of± 50°,and a gain reduction less than 2 d B when the scanning angle reaches± 50°。Finally,in view of the electromagnetic coupling and crosstalk problems that are prone to occur in multi-channel T/R chips due to their close channel distances,a COB packaging design based on gold wire bonding technology was conducted.The RF simulation results demonstrate that,within the range of 78-98 GHz,the return loss is superior to 12 d B,the insertion loss is less than 1.5d B,the amplitude difference is below0.8d B,the phase difference is less than 4°,and the isolation surpasses 25 d B.At the same time,CPWG fanout and CPWG rectangular waveguide(RWG)transition models were introduced,and the overall packaging module and back to back structure of 4T/4R chips were designed and fabricated.The test results verify the feasibility and excellent performance of the chip packaging design,and the related structures can be used in multichannel chip packaging and phased array systems.更多还原