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掺杂HfO2负电容晶体管及随机涨落建模研究

Modelling Study of Doped-HfO2 Based NCFET and Its Variation

【作者】 余豪;

【导师】 王兴晟;

【作者基本信息】 华中科技大学 , 微电子学与固体电子学, 2021, 硕士

【摘要】 伴随着集成电路的使用场景越来越丰富和复杂,移动终端以及各种低功耗应用在日常生活中的重要程度与日俱增,为了能够满足更复杂的功能以及更低的功耗,降低晶体管的操作电压以及关态泄漏电流是极为有效的方式。得益于负电容晶体管中(Negative Capacitance FET,NCFET)栅极铁电层对于电压的放大作用,NCFET的亚阈值摆幅可以进一步减小甚至低于常规晶体管的理想最低值,这意味着相同的栅电压变化可以为NCFET带来更大的漏端电流的变化,因此使得降低操作电压成为可能。另外,由于Hf O2基铁电材料与CMOS工艺良好的兼容性以及优秀的可微缩性,基于该材料的NCFET拥有持续推动集成电路工艺节点技术进步的能力。而面向先进工艺节点的器件由于其物理尺寸极小,随机涨落特性成为影响器件性能的一个重要因素。本文将基于7纳米FinFET平台利用Sentaurus TCAD软件以及Landau-Khalatnikov模型对7纳米NC-FinFET器件进行仿真,在验证NC-FinFET的性能优于FinFET器件之后解释了在NC-FinFET器件中独特的负DIBL(negative-Drain Induced Barrier Lowering)效应以及负微分电阻效应(Negative Differential Resistance,NDR)。另外,本文基于铁电材料的实际物理特征即多晶特性对NC-FinFET中的铁电层进行了TCAD建模且提出了与其适配的TCAD多晶NC-FinFET仿真框架,并在考虑了铁电材料中介电相晶粒的存在以及晶粒取向之后对多晶NC-FinFET进行了随机涨落分析,当铁电层平均晶粒尺寸与用于判断介电相的临界尺寸均为3nm时器件阈值电压的标准差达到7m V而开态电流的标准差达到2.232μA(占开态电流的3.5%),当晶粒取向的标准差为25o时器件阈值电压标准差达11 m V而开态电流标准差达1.066μA,这与传统随机涨落的影响在同一个量级。同时,由于铁电多晶与金属栅多晶的耦合效应,NC-FinFET中将出现一个新的随机涨落,该耦合效应导致的涨落与金属栅晶粒的平均尺寸为正相关的线性关系。

【Abstract】 As the use scenarios of integrated circuits become more abundant and complex,the importance of mobile terminals and various low-power applications in daily life is increasing day by day.In order to meet more complex functions and lower power consumption,reducing the operation voltage and off state current of transistors is an effective method.Thanks to the voltage amplification effect of the gate ferroelectric layer in NCFET(Negative Capacitance FET),the subthreshold swing of NCFET can be further reduced even lower than the ideal minimum value of a conventional transistor,which means that the same gate voltage change can bring a greater change of drain current,thus making it possible to reduce the operating voltage of transistors.In addition,due to the good compatibility of Hf O2-based ferroelectric materials with CMOS technology and excellent scalability,NCFET based on this material has the ability to continuously promote the technological progress of integrated circuit process nodes.However,because of the extremely small physical size of devices for advanced process nodes,random fluctuation characteristics have become an important factor affecting device performance.This article will use Sentaurus TCAD software and Landau-Khalatnikov model to simulate NC-FinFET devices based on the 7nm FinFET platform.After verifying that the performance of NC-FinFET is better than FinFET devices,we explain the unique n-DIBL(negative-Drain Induced Barrier Lowering)effect and NDR(Negative Differential Resistance)effect in NC-FinFET devices.Furthermore,based on the actual physical characteristics of the ferroelectric material,that is,the polycrystalline characteristics,the TCAD modeling of the ferroelectric layer in the NC-FinFET is carried out and the corresponding TCAD polycrystalline NC-FinFET simulation framework is proposed.After the existence of the dielectric phase crystal grains in the ferroelectric material and the crystal grain orientation are considered,random fluctuations of the polycrystalline NC-FinFET are analyzed.When the average grain size of the ferroelectric layer and the critical size for determining the dielectric phase are both 3nm,the standard deviation of threshold voltage reaches 7m V and the standard deviation of on-state current reaches 2.232μA(accounting for3.5%),and when the standard deviation of grain orientation is 25o,the standard deviation of device threshold voltage reaches 11m V and the standard deviation of on-state current reaches 1.066μA,which is comparable with the traditional random fluctuation sources.At the same time,due to the coupling effect between the ferroelectric polycrystalline and the metal gate polycrystalline,a new random fluctuation source will appear in the NC-FinFET.The fluctuation caused by the coupling effect is positively correlated with the average size of the metal gate crystal grain.

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