节点文献
相控阵敏感器测控设备研制
Development of Phased Array Sensor Testing System
【作者】 王志伟;
【导师】 付宁;
【作者基本信息】 哈尔滨工业大学 , 仪器仪表工程(专业学位), 2019, 硕士
【摘要】 相控阵敏感器由信号处理器、波控机、T/R组件和天线四部分组成,为保障相控阵敏感器的各项性能,需要在相控阵敏感器的研制、生产、交付和使用等各个阶段对其进行严格而全面的测试和验证。鉴于此,本课题研制一套便携式相控阵敏感器测控设备,该设备能够模拟多个环境实现对相控阵敏感器整机级和组合级的全部功能指标测试,快速的为技术人员提供有效的评测数据,确保相控阵敏感器达到全部技术要求,为我国的航天事业保驾护航。针对相控阵敏感器测试设备集成度低、通用性差的问题,本文提出了一种基于PXI和FMC双重总线的解决方案,主要方法为:测控设备选用便携式控制平台,采用模块化设计思想,开发了基于PXI总线的模拟采集卡、1553B通讯卡和异步422通讯卡。板卡均采用“载卡+夹层卡”的结构形式,载卡和夹层卡设计遵循可支持高10Gb/s的信号传输速率FMC总线接口标准,通过标准化总线形式将I/O接口与FPGA分离开来,有效的提高设备的通用性和灵活性。本文重点介绍了载卡的电源管理、可编程控制器、总线接口的关键电路和夹层卡模数转换模块、1553B总线模块的关键电路设计;详细说明了各功能模块FPGA逻辑架构和时序关系。应用软件方面选择NI公司的Lab VIEW作为开发和调试平台,针对软件中同步和实时性的问题,测试软件主要采用了多线程技术并结合同步队列技术,多线程技术主要通过高效率的生产者/消费者结构来实现,保证了数据的完整性和实时性。针对T/R组件多阵列多通道收发系统的大工作量测试,测试软件通过控制硬件资源实现了自动测试。软件中的设计工作主要包括:基于VISA库的驱动程序设计、上位机界面的设计、软件功能模块的划分、测试流程的设计和数据管理方法的设计。硬件和软件高度配合共同完成对相控阵敏感器在不同条件下的测试任务,文章最后给出了测控设备的验证测试方法。相控阵敏感器测控设备现已交付用户使用,运行状态良好、可靠,能够满足相控阵敏感器的全部测试需求,同时具有操作便捷、集成度高、通用性强、可维修性高等特点。
【Abstract】 Phased array sensor is composed of signal processor,wave controller,T/R component and antenna.In order to ensure the performance of phased array sensor,it is necessary to conduct rigorous and comprehensive test and verification in all stages of development,production,delivery and use of phased array sensor.In view of this,this thesis developed a portable phased array sensor measurement and control equipment,whitch is supposed to simulate multiple environments for the phased array sensor machine function indexes and combination of all tests,quickly provide effective evaluation data for the technical staff,to ensure that the phased array sensor meet all technical requirements,for our country’s space program.In face of the low integration and poor universality of phased array sensor test equipment,this paper proposes a solution based on hybrid PXI and FMC bus,and the main method is as follows: portable control platform is chosen.Analog acquisition card are designed based on the idea of modular design.1553 B communication card and asynchronous communication RS422 card,these boards adopt the structure of "card + mezzanine card".Carrier and sandwich design follow can support high signal transmission rate of 10Gb/s FMC in accordance to bus interface standards.I/O interface can be seperated from the FPGA,which effectively improve the generality and flexibility of the equipment.This paper mainly introduces the key circuit design of FMC carrier is power management unit,programmable control unit,interface bus unit,interlayer card adc module and 1553 B bus module.The FPGA logic structure and timing relationship of all functional modules are described in detail.The NI company Lab VIEW is chosen as the application software development and debugging the platform,aiming at implementing synchronization and real-time in the software.The testing software mainly adopts the multi-thread technology combined with synchronous queue,which is primarily accomplished by efficient producer/consumer structure.This can ensure the integrity of the data and real-time performance.In face of the heavy workload test of T/R component multi-array multi-channel transceiver system,the test software realizes the automatic test by controlling the hardware resources.The design work in the software mainly includes: the driver design based on VISA library,the design of upper computer interface,the division of software function module,the design of test process and the design of data management method.The hardware and software work together to test the phased array sensor under different conditions.At last,the verification test method of the measurement and control equipment is given.Phased array sensor measurement and control equipment has been delivered to the user,running in good reliable and condition.It can meet all the testing requirements of phased array sensor,and has the characteristics of convenient operation,high integration,strong universality and high maintainability.
【Key words】 FMC architecture; synchronous data acquisition; 1553B communication; virtual instrument;