【作者】 徐亮；

【导师】 方向忠； 孔凡芝；

【作者基本信息】 上海交通大学 ， 电子与通信工程（专业学位）， 2014， 硕士

【摘要】 高清数字机顶盒在当前的数字通信和图像处理技术中占据了十分重要的地位,是实现数字信号接收、点播高清视频节目的终端设备。随着通讯技术和高清技术的不断发展,机顶盒的产品更新换代也变得越来越快;消费者们对数字节目图像的质量、机顶盒芯片的处理能力、带宽、数据交换能力的要求也越来越高。这使得设计一个高速、稳定的数据读写模块——DDR内存控制器尤为重要。先进的内存技术标准对实现大容量、高速度、高带宽的数据处理能力,对满足高清机顶盒的系统需求,提升电子产品的品质和质量起到了重要的作用。本文研究了高清机顶盒和DDR存储技术的发展趋势,分析了高清机顶盒的系统结构,重点研究了芯片内部的DDR内存控制器的硬件架构,工作原理以及DDR存储器的工作方式和相关技术规范,详细描述了DDR3内存控制器的具体结构和实现原理,设计并比较了DDR3的内存控制器的验证与测量的实现方案。在实际的研究工作当中,我们采用了符合DDR内存测量要求的验证和测试方案,根据DDR标准的要求定义了芯片中内存控制器的各项参数,并且将测量结果与系统设计期望进行比较和优化。同时通过对信号波形的测量和分析,对现有的设计参数进行验证,以满足对不同电压、温度等环境的需求。基于目前主流的DDR内存技术,本文提出了一个机顶盒芯片中的内存控制器的总体的设计方案和验证方法。该设计可以有效的降低访问延迟、提高数据访问带宽、满足不同系统环境的稳定性要求,为今后的设计研发提供了一定的参考价值。更多还原

【Abstract】 High definition digital set top box occupies a very important position in current digital communication and image processing technology.It is a terminal device for receiving digital signal and playing HD video program.With the development of communication technology and high-definition technology,set-top box products upgrade more and more quickly;the customers require a higher digital video quality,STB chip processing ability,bandwidth and data exchange capability.So it is very important to design a high-speed,stable DDR memory controller module.The latest DDR technology standard can realize the large capacity,high speed,and high bandwidth data processing ability,and improve the quality of the electronic products.This paper describes the trend of high-definition set top box and DDR storage technology development,analyzes the system structure of HD set-top box.Also,it focuse on the the hadware architecture,working principle and relevant technical specifications of the DDR memory.We design and compare the different planning of how to validation DDR3 memory controller.In the actual research,we adopt an optimal validate and test plan base on the DDR requirement,define the parameters of the memory controller in the SOC chip following the specification,and compare the result with the system expectation..At the same time through the measurement and analysis of signal waveform,it verifies existing design parameters,to meet the different voltage,temperature and other environmental requirements.Based on the current DDR memory technology,this paper proposes a general design and verification of the DDR memory controller in set-top-box chip.This design can effectively decrease the access latency,improve the data access bandwidth,and meet the stability in different system environment.It provides a certain value for the design and development in the future.更多还原