【作者】 陈勇；

【导师】 来新泉；

【作者基本信息】 西安电子科技大学 ， 电路与系统， 2018， 硕士

【摘要】 随着科技的进步,人类生活水平的提高,人们对音频播放的质量也提出了更高的要求。数字音频处理技术以其更高的保真度(采样精度高和采样频率高)、处理过程中不易混入噪声(不受温度和电压等因素的影响)、实现方式简单多样等优点已经逐步取代了传统的模拟音频处理方式。目前,高性能数字音频处理器已经被广泛的应用于笔记本、汽车音响、手机、家庭影院等设备中。因此设计一款高性能、多功能、高保真的数字音频处理专用芯片具有十分重要的现实意义。本论文来源于西安电子科技大学电路CAD所科研项目“高速电子电路电磁制造技术研究/数字音频功放与智能型光电传感集成电路关键技术”,深入研究了音效处理的算法,结合目前主流数字音频处理的系统结构,设计并实现了一款可编程的高性能数字音频处理器。本论文的主要研究内容和成果如下:1.在音效处理过程中,采用了多采样率变化技术以支持更高的采样频率,系统最高可支持192KHz的采样频率,为了突破主时钟频率的限制,改进了插值和抽取滤波器的实现结构,不仅节省了时钟资源,而且将存储资源降低至传统的一半。2.针对传统3D音效处理过程计算量大、存储量大等缺点,提出了一种新的3D音效算法。该算法具备结构简单,计算量小等优点。3.在音量控制方面加入了多频段AGL,实现了更加丰富的动态范围控制。本设计将传统的频率分割器实现结构进行优化,减少了滤波器的使用,从而减小芯片面积。4.改进了音效均衡器单元的硬件实现结构,在计算量保持不变的情况下,将存储资源降低至传统的一半。5.提出了一种3阶Mash结构的音频sigma-delta(Σ-Δ)DAC。该数模转化器采用一阶相位累加器来实现传统的Σ-Δ架构,并将其使用硬件描述语言来实现,这样整个系统均采用数字实现,从根本上解决了各级间的失配问题,从而提高系统性能。实测芯片得到的SNDR高达到90dB,THD+N保持在0.4%以内。本论文首先介绍了该数字音频处理的整体架构;然后对各个子模块的算法进行研究,采用MATLAB中simulink仿真工具进行验证,并对算法进行优化;接着使用verilog语言实现各个模块,并对各个子模块的RTL级代码,进行详细的仿真验证;然后使用FPGA对整个数字音频处理过程进行原型验证,确保其在时序和功能上能满足硬件实现的要求;接着采用Magnachip 180nm 1P4M标准CMOS工艺进行数字后端设计,生成最终的流片版图;最后再对芯片的功能和性能进行详细的测试。更多还原

【Abstract】 With the advancement of science and technology,and the improvement of human living standards,people have also put forward higher requirements for the quality of audio playback.Digital audio processing technology has gradually replaced the traditional analog audio processing,because of the advantages of its higher fidelity(high sampling accuracy and high sampling frequency),the inability to mix noise during processing(not affected by temperature,voltage,etc.),and the simple and versatile implementation methods.At present,high-performance digital audio processors have been widely used in notebooks,automotive influences,mobile phones,home theaters and other devices.Therefore,designing a highperformance,multi-functional,high-fidelity digital audio processing chip has a very important practical significance.This thesis is originated from the scientific research project of Institute of Electronic CAD of Xidian University,"Research on Electromagnetic Manufacturing Technology of High Speed Electronic Circuit/Key Technologies of Digital Audio Power Amplifier and Intelligent Photoelectric Sensing Integrated Circuit".In-depth study of the sound processing algorithm,combined with the current mainstream digital audio processing system architecture,design and implementation of a programmable high-performance digital audio processor.The main research contents and results of this paper are as follows:1.In the audio processing process,multiple sampling rate changes are used to support higher sampling frequencies,up to a sampling frequency of 192 KHz.In order to overcome the limitation of the master clock frequency,the structure of the interpolation and decimation filter is improved,not only saves clock resources,but also reduces storage resources to half of the traditional.2.Aiming at the shortcomings of traditional 3D audio processing,such as large amount of calculation and large amount of storage,a new 3D audio algorithm is proposed,which has advantages such as simple structure and small amount of calculation.3.The multi-band AGL has been added to the volume control to achieve more dynamic range control.This design optimizes the structure of the traditional frequency divider and reduces the use of filters,thereby reducing the chip area.4.The hardware implementation structure of the audio equalizer unit has been improved,and the storage resources are reduced to half that of the conventional ones in the case where the amount of calculation remains unchanged.5.An audio sigma-delta(Σ-Δ)DAC with 3rd order Mash structure is proposed.The digitalto-analogue converter uses a first-order phase accumulator to implement the traditional Σ-Δ architecture and implements it using hardware description language.This way,the entire system is implemented in digital and fundamentally solves the mismatch between levels problems,thereby improving system performance.The measured SNDR of the chip is as high as 90 d B,and the THD+N is kept within 0.4%.This thesis firstly introduces the overall architecture of the digital audio processing;then studies the algorithms of each sub-module and uses the simulink simulation tool in MATLAB to verify and optimize the algorithm to make it more suitable for hardware implementation;then the verilog language is used to implement each modules,and perform detailed simulation verification of the RTL-level code of each sub-module;then use FPGA to prototype the entire digital audio processing process to ensure that it meets the hardware implementation requirements in terms of timing and functionality;then digital back-end design using Magnachip 180 nm 1P4M standard CMOS process,generate the final tape layout;Finally,conduct detailed test on the function and performance of the chip.更多还原