【作者】 杨柳；

【导师】 金湘亮；

【作者基本信息】 湘潭大学 ， 电子科学与技术， 2017， 硕士

【摘要】 MEMS(Microelectromechanical Systems)加速度传感器是MEMS器件中重要的一类,有着广泛的应用,如汽车的安全性和稳定性、生物医学应用、石油和天然气勘探以及电脑配件等。石油勘探最常用的方法之一就是地震勘探,在地震检测领域,与常规检波器相比,利用MEMS技术实现的检波器具有更好的线性度和动态范围,且具有更高的灵敏度等特点,成为目前发展主流。MEMS检波器主要包括电容加速度传感器和信号检测专用集成电路芯片(Application Specific Integrated Chip,ASIC)。MEMS传感器信号处理电路主要用来检测MEMS电容传感器敏感质量块所受到的加速度,并将其转换成电压信号。本文主要从MEMS电容加速度传感器电容检测原理出发,针对目前研究存在的加速度计线性度低等缺陷,结合CMOS工艺特点和已有的研究基础,提出了二阶模拟闭环力平衡反馈模式下开关电容电路检测方案。其读出电路主要包括电容补偿阵列、参考源、多相时钟、全差分开关电容电路、RC低通滤波和仪表放大器等。其中,全差分开关电容电路采用相关双采样技术消除失调,仪表放大器采用三运放结构,对差分信号进行单端输出,具有噪声小、精度高等特点。基于旺宏L50W 0.5μm工艺,针对该力平衡反馈模式对系统进行了时序设计,完成了读出电路设计分析与仿真验证、版图设计与后仿真验证及其流片。本文针对野外勘探ESD(Electrostatic Discharge)防护要求更为严苛,以及高压ESD防护高触发、低维持的难点,对读出电路进行全芯片ESD防护设计,芯片的I/O端口采用互补式的栅极耦合技术的PMOS和NMOS,电源端口采用栅极耦合技术的NMOS,有效提高了芯片的ESD防护等级。整体芯片前后仿验证均表明该系统具有线性度高、噪声和失调低等特点,并在旺宏L50W 0.5μm工艺下进行流片。更多还原

【Abstract】 MEMS(Microelectromechanical Systems)accelerometers are of great significance among various accelerometers.They are applying to a wide range of motivation detection,including biomedical applications,automotive safety and stability,computer accessories and oil,gas exploration,etc.Among various mechanisms in seismic exploration,MEMS detector is the dominant sensing methods,since it not only provides excellent resolution,but also has advantages of wide dynamic range and high sensitivity.MEMS detector consists of a capacitive acceleration sensor and an application specific integrated chip(ASIC).MEMS acceleration sensor signal processing circuit is mainly used to detect the acceleration of the sensitive mass of the MEMS capacitive acceleration sensor and convert it into voltage signal.In this paper,the working principle of MEMS accelerometer readout circuit is analyzed,including MEMS sensor,capacitance detection and the readout circuit.In order to reduce the noise and improve the linearity,it adopts analog closed-loop switched capacitor detection system.The readout circuit is composed of a capacitance compensation array,a reference source,a multi-phase clock,a fully differential switched capacitor circuit,a RC low-pass filter and an instrument amplifier.The fully differential switch capacitor circuit adopts correlated double sampling technique to eliminate the imbalance,and the three op amp instrumentation amplifier structure can achieve single output from double end signal.High trigger voltage and low holding voltage are challenge of high voltage ESD(Electrostatic Discharge)in field exploration.In the readout circuit,I/O port ESD protection achieved by using complementary gate-coupling technique of PMOS and NMOS,and power clamp is gate-coupling technique NMOS,effectively improving ESD protection level.It’s verified that the whole chip obtains high linearity and low noise and offset.Finally,it carried out in MXIC L50 W 0.5 μm process.更多还原