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基于65nm CMOS工艺低能耗低噪声LC振荡器研究与设计
The Research and Design of Low Power and Noise LC Oscillator Based on 65nm CMOS Process
【作者】 王伟;
【导师】 林福江;
【作者基本信息】 中国科学技术大学 , 电子科学与技术, 2016, 硕士
【摘要】 集成电路产业的快速发展给市场带来了前所未有的丰富的通信产品,同时消费者也对无线通信终端变得越来越挑剔,设计一款速度更快、更安全、功耗更低的产品正变得越来越富有挑战性。压控振荡器作为蓝牙4.2无线收发机中频率源的核心,它的设计标准逐渐变得越来越严苛,振荡器最重要的两个参数功耗和相位噪声一直以来都是设计者们研究与关注的目标。本文基于标准的SMIC 65nm CMOS工艺分析与设计了两款应用于蓝牙4.2版本的电容电感压控振荡器。在对振荡器组成部分和起振情况简明扼要的分析之后,论文着重分析总结了当前三种计算LC压控振荡器白噪声相位噪声模型:紧接着汇总了当前两种可能引起MOS晶体管闪烁噪声输出转换的效应,然后分析了几种能够有效的降低振荡器相位噪声的技术。首次通过利用计算混频器低频噪声输出的方式,得到差分LC振荡器共模点二次谐波所引起AM-PM转换效应大小,并在此基础上通过对尾电流滤波振荡器进行后仿验证晶体管存在寄生电容非线性造成振荡器相位噪声恶化效应,仿真结果显示在1V电源电压下,该振荡器的功耗仅为0.6mW,相位噪声为-124dBc/Hz@lMHz,-77dBc/Hz@10kHz,FOM为194,振荡频率范围为2.32-2.65GHz,线性可调谐范围为13%,分析了电流复用振荡器输出幅度大小与设计参数的关系,从理论上解决了传统输出幅度不对称问题,随后通过分析振荡器电流效率与电流导通角的关系,得到Class-C振荡器拥有更高的电流效率依据,在此基础上提出了一种基于幅度反馈低功耗C类LC压控振荡器的设计,解决了Class-C起振和最优工作点偏置问题,并介绍了C类振荡器的工作过程。最后通过对C类电流复用压控振荡器后仿可以得到,在1.2V电源电压下,压控振荡器的功耗为1.1mW,相位噪声为-126dBc/Hz@1MHz,FOM为193,振荡频率范围为2.3-2.6GHz,可调谐范围为12%,综合性能具有一定竞争力。
【Abstract】 The rapid development of the integrated circuit industry bring an unprecedented wealth of communications products to the market, while consumers are becoming more Critical about the wireless communication terminals, and the design of a faster, more secure, lower-power products are becoming more and more challenging Voltage controlled oscillators are the core of Bluetooth 4.2 wireless transceiver frequency sources. The design standards of VCOs are gradually becoming more stringent. Power and phase noise, the two most important parameters of the oscillator have always been concerned with the goal of the designers. Based on SMIC65nm CMOS process, two versions of the voltage voltage controlled oscillators used in Bluetooth 4.2 standards are analysised and well designed.After introducing the important components of oscillators and the startup condition,the paper emphatically analyzed the three calculation LC-VCO phase noise white noise model.Then the paper make a summary of the current two possible way that can cause MOS transistor flicker noise convert to output phase, and analyzes several designs that can reduce the oscillator phase noise. Firstly,this paper calculated how much the differential LC oscillator common-mode point of the second harmonic contribute to phase noise due to AM-PM conversions the way of calculating low-frequency noise output of the mixer. It verify that the existence of the parasitic capacitance of the transistor caused by the nonlinear oscillator can deteriorate phase noise,in the filter VCOs,by the post-simulation. Simulation results show that under IV supply voltage, voltage-controlled oscillator only consumes 0.6mW and;the phase noise is-124dBc/Hz@ 1MHz and-77dBc/Hz@ 10kHz,;FOM is 194; the oscillation frequency range is 2.32-2.65GHz and linear tuning range of is about 13%,Firstly the paper Analysises the relationship between the size of circuit parameters and the current reuse oscillator output amplitude and it solve the traditional problem of asymmetric output amplitude theoretically then it analyze the relationship between current efficiency and current oscillator conduction angle resulting the Class-C oscillator having a higher current efficiency. A low-power feedback amplitude class C LC-VCO is designed, solving the class-C start-up and optimum operating point bias problem, based on this theory. Finally, the Class-C current-reuse VCO simulation results can be obtained at 1.2V supply voltage, it consumes 1.1mW,with the phase noise of -126dBc/Hz@ 1MHz; FOM is 193, the oscillation frequency is 2.3~2.6GHz, tuning range of is about 12%. its Overall performance is a competitive selection
【Key words】 LC; VCO; Class-C; lower power; phase noise; current-reused;