【作者】 张琳；

【导师】 杨骁； 杨守军；

【作者基本信息】 华侨大学 ， 电子与通信工程（专业学位）， 2015， 硕士

【摘要】 车载防撞雷达是汽车自适应巡航系统(Adaptive Cruise Control,ACC)的重要组成部分。调频连续波(Frequency Modulated Continuous Wave,FMCW)雷达具有高分辨率、低发射功率、尺寸小的优势,因此受到广泛应用。线性调频源的性能决定了FMCW雷达的性能指标,因此,本文针对应用于24GHz FMCW车载防撞雷达中线性调频源的Σ-Δ小数频率合成器进行了研究与设计。本文首先分析了FMCW雷达的基本理论与雷达测距、测速的工作原理,对比了常见的雷达线性调频信号合成方法,并根据FMCW车载防撞雷达系统对线性调频源的性能要求,选定了一种低成本、能实现高线性度的FMCW合成方案:Σ-Δ小数频率合成法,作为本课题的设计方案。在本文的研究中,采用Top-Down的设计方法,首先对实现线性调频源的Σ-Δ小数频率合成器进行了Simulink建模与仿真,根据系统仿真结果确定了频率综合器系统的关键参数。在此基础上,本文在TSMC 0.18μm CMOS 1P4M工艺下对关键电路模块进行了设计、仿真和版图实现,包括无鉴相死区的鉴频鉴相器电路、充放电电流高度匹配的电荷泵电路、可实现在16~31范围内小数分频的多模分频器和Σ-Δ调制器、环路滤波器以及带隙基准电流偏置。其中,为了防止由工艺偏差等导致的PFD延时过长或过短,设计了PFD复位延时时长可调电路模块;电荷泵电流大小可以根据带宽要求在300?A~5 m A范围内选择,能缩短锁定时间,适应雷达在不同场合的需求。在外接VCO采用Verilog-A模型的条件下对电路进行仿真:电荷泵电路输出电压在0.5V~2.8V范围变动时,充放电电流失配率小于1%;在100MHz参考时钟频率下,环路锁定时间为12?s。基于该Σ-Δ小数频率合成器的线性调频源能满足自适应巡航系统对车载防撞雷达的性能需求。更多还原

【Abstract】 Automobile anti-collision radar is an important part of adaptive cruise control(ACC). FMCW(Frequency Modulated Continuous Wave) radar, which presents significant advantages, such as high-resolution, low-emission power, more compact size, has been wide used. In order to achieve high system performance, it requires a well-designed FMCW generator. This paper presents a Σ-Δ fractional-N frequency synthesizer for FMCW generator operating in an Automobile radar.This paper briefly analyses the theory of anti-collision radar and discussed several means of generating ramp wave, in order to meet the needs of collision avoidance radar, we choose to generate FMCW by using a fractional-N frequency synthesizer. The Top-Down design methodology is applied to design the fractional-N frequency synthesizer. By using Matlab’s Simulink module to create a mathematical model description of the system, we determined the the frequency synthesizer system parameters. The frequency synthesizer consists of a none dead-zone PFD circuit, a charge pump circuit with charge and discharge current highly matched, a multi-modulus divider and a Σ-Δ modulator which can achieve fractional divider from 16 to 31, a bandgap reference, and a loop filter. While the current of charge pump is adjustable from 300 ?A to 5m A, the PFD delay can also be adjusted in order to meet the requirement.Simulated with off-chip VCO modelled by Verilog-A,the charge pump current mismatch rate was less than 1% when the output voltage changed from 0.5V to 2.8V; the loop lock time was about 12 ?s from power on while the reference frequency is 100 MHz. The performance of the FMCW generator based on this Σ-Δ fractional-N frequency synthesizer has reached the requirements needed by the ACC radar system.更多还原