【作者】 汪浩；

【导师】 陈学英；

【作者基本信息】 电子科技大学 ， 电路与系统， 2015， 硕士

【摘要】 石油作为当前世界上最重要的资源之一,一直以来对其勘探技术的探索从未停止过。随着电子技术的进步,特别是半导体器件工艺的发展,电磁波测井和感应测井等电法测井技术越来越成为当前测井领域的核心技术。我国的电法测井研究起步较晚,电磁波和感应测井仪长期遭受国外测井公司的垄断和技术封锁。新形势下的国内电法测井领域面临着摆脱国外压制、开拓海外市场的战略要求,因而新型具有自主知识产权的电磁波和感应测井仪的研制就成为一项迫在眉睫的重要任务。本文讨论的电磁波测井仪应用于随钻测井系统中,因而对电路具有较高的要求。由于当前测井仪器多尺度、多维度测量的设计要求,仪器线圈和电路结构的设计更加复杂。接收电路是电磁波测井仪的核心电路之一,对仪器的测量精度具有直接影响。本文采用零中频的接收电路设计方法,简化了电路结构,降低了电路功耗,缩减了电路尺寸;设计了一种基于FPGA的DPSD算法实现新方法,有效减少了逻辑资源占用,提高了算法效率。最终通过实验与测试验证了接收电路总体软硬件设计的合理性和有效性,满足设计要求。感应测井的直耦对消是仪器调试过程中的一个重要步骤。由于线圈匝数较多,线圈结构复杂,因而对消过程极为繁琐。本文提出了一种用于感应测井直耦信号对消的改进方法,该方法能够大大简化对消过程,对消精度高、稳定性好,并且能够实现直耦信号的在线自动对消。最终的实验结果表明,改方法能够有效完成直耦信号的自动对消,满足设计要求。更多还原

【Abstract】 Petroleum is the most important natural resource in the world. All the time, research of petroleum exploration technology has never been stopped. With the improvement of electronic technology, especially the semiconductor device and manufacture technology, electromagnetic wave logging and induction logging have become the core technology in the field of electrical logging.In China, the research on electrical logging started later, electromagnetic wave and induction logging suffered long-term monopoly and technical blockade of foreign logging company. Under the new situation, domestic electrical logging field is facing the strategic requirements of getting rid of foreign pressure and exploiting the overseas market, so the research of electromagnetic wave and induction logging, which have proprietary intellectual property rights, is now an imminent important task.This paper discusses the application of electromagnetic wave logging in logging while drilling(LWD) system, so it has higher requirements on the circuits. Due to the requirements of measuring in multi scale and multi dimension, the design and structure of the coils and the circuits have become more complex. The receiving circuit is one of the core circuit of an electromagnetic wave logging instrument, which has a direct influence on the accuracy of measurement. In the paper, the design of receiving circuit adopts the Zero-IF receiver structure, which could simplify the circuit structure, reduce the power consumption and decrease the circuit size. A new method to realize DPSD algorithm based on FPGA is designed, which could effectively reduce the logic resource occupation and improve the efficiency of the algorithm. Finally, the rationality and validity of software and hardware designed by these methods are verified by experiment and test, which meet the design requirements.Direct coupling restraining is an important step in the installation of induction logging instrument, and could be very complicated because of the large amount and complex construction of coil. In this paper, a improved method is raised to greatly simplify the process of direct coupling restraining, to improved the precision and stability, and to realized the on-line and automatic direct coupling restraining. he results show that the modified method can effectively meet the design requirements.更多还原