【作者】 张娜；

【导师】 顾华玺；

【作者基本信息】 西安电子科技大学 ， 通信与信息系统， 2014， 硕士

【摘要】 与传统的宏观网络相比,芯片面积、能耗和实现复杂度是片上网络(Network-on-Chip,NoC)的三个主要硬件实现限制,而片上路由器输入端口中的缓存占用了大量的芯片面积,消耗了大量的能耗。为了有效解决这个问题,无缓存片上网络去除路由器内的输入缓存,通过偏转竞争中失败的分组(或微片)到其他可用的输出端口,来处理分组(或微片)对输出端口的竞争问题。在中低网络负荷下,偏转发生的频率很低,对网络性能影响非常小。然而,在高网络负荷下,偏转频繁会降低无缓存片上网络的性能。因此,如何降低偏转概率是设计无缓存片上网络中的关键问题。本文总结了片上网络研究背景及发展现状,并对无缓存片上网络关键技术进行了系统性研究,主要取得以下研究成果。1.现有的无缓存片上网络设计没有提供服务质量(Quality-of-Service,QoS)保障,因此本文设计了一种面向服务质量的无缓存片上网络(QoS-aware Bufferless NoC,QBNoC)。该设计对实时性应用采用电路交换机制,对其他应用采用虫孔交换机制。为了降低偏转概率,本文提出一个两阶段的输出端口分配策略。此外,本文设计了一个关键路径较短的路由器结构,以进一步降低网络的平均时延。仿真结果表明,通过高效利用资源,QBNoC显著提高了整个网络的性能,同时满足了不同应用的服务质量需求。2.对于分组交换的光片上网络来说,考虑到没有成熟的光缓存技术,采用偏转路由解决输出端口竞争的无缓存光片上网络更加可取。本文提出一种新的5*5光片上路由器,设计支持偏转路由的光交换结构以及降低偏转概率的注入单元和注出单元。此外,针对新的光交换结构,本文设计了基于优先级的路由算法和端口分配算法。仿真结果表明,在可接受的插入损耗下,该路由器结构可以改善网络性能。更多还原

【Abstract】 Compared with off-chip network, chip area, power consumption, and implementation complexity are the first-class hardware implementation constraints of Network-on-Chip(No C). However, a high proportion of chip area and power consumption is consumed by the buffers in the input ports of router. In order to solve the problem, the bufferless No C, which eliminates in-router buffers and copes with contention by deflecting packets/flits, has been proposed. The bufferless No C has been shown to operate efficiently under low or moderate workload, owing to infrequent deflections. Nevertheless, under high workload, frequent deflections lead to deterioration of performance. Therefore, how to reduce the deflection probability is the key issue of designing bufferless No Cs.This thesis summarizes the background and development of No C, and conducts a systematic research on the critical techniques of bufferless deflection No Cs. Our research achievements are shown as follows.1. The existing bufferless No C designs do not provide Quality-of-Service(Qo S) guarantees. In this thesis, we propose a Qo S-aware Bufferless No C, named QBNo C. QBNo C employs hybrid switching mechanism, namely circuit switching mechanism for real-time application and wormhole switching mechanism for other applications. Besides, in order to decrease the deflection probability and thus improve the performance of the network, we propose a new output port allocation policy. Furthermore, new router architecture with shorter critical path is designed for QBNo C. The evaluation results show that by efficiently exploiting resources, our proposal significantly improves the performance of the whole network, and meanwhile satisfies the Qo S requirements of different applications.2. In optical No C using packet switching mechanism, considering no mature optical buffering technology, deflection routing is preferable to resolve the output port contention. This thesis proposes a new 5*5 router architecture, and especially a deflection-supported switching fabric. Moreover, an ejection unit and an injection unit are designed to reduce the deflection. Additionally, priority-based routing computation and port allocation algorithms are designed based on the new switching fabric. The simulation results show that our proposal can improve performance at acceptable insertion loss.更多还原