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多路数字电视信号合路器的设计

Design of Multi-channel Digital Television Signal Combiner

【作者】 王卓

【导师】 董静薇;

【作者基本信息】 哈尔滨理工大学 , 通信与信息系统, 2013, 硕士

【摘要】 近年来地面数字广播系统技术日益突破,在地面数字电视广播传输标准的实施和普及过程中将大量涉及地面数字单频网传输,为提高信道利用率,节省频谱资源,本文专门为视频信号传输设计了一款适合多种传输手段的产品——ASI合路器。ASI合路器主要由控制系统和合路器两部分组成。本文设计了控制系统和合路器的硬件部分。控制系统选用STM32F107RCT6作为主控芯片,因为其内部具备以太网MAC控制器,可以实现合路器的网页控制功能,主控芯片外围电路有复位电路,电源电路,JTAG调试电路和时钟电路等。用AT24C64芯片设计了EEPROM存储器电路,用DP83848芯片和HR911105芯片完成了以太网控制器及接口的电路设计,同时为实现合路器按键控制功能,本文设计了按键电路,液晶显示电路及为其供电的负载开关电路。合路器选用FPGA的EP2C8作为核心芯片,用CY7B933/923芯片设计了发送器/接收器。本文使用C语言在MDK编译环境下完成编程,实现对合路器控制系统的代码编写。通过移植LwIP协议实现了对合路器的网页控制、各路码率的实时监测,另外添加了修改登陆密码,IP地址等功能。本文为操作方便还设计了合路器按键控制,通过转换键值实现合路器各路开关闭合的控制,其各路端口号及码率可以再液晶屏上显示,文中还设计了SPI通信程序,通过读写寄存器向合路器发送各路开关指令,并回传传输码率。上位机和合路器的人机交互界面由HTML语言编写,显示所有合路器的控制功能。ASI合路器可应用于CMMB、DVB-T、DTMB等网络系统,采用上架结构,1U标准机箱,可用于军民用数据信息的传输及各类雷达情报的传递使用。合路器可完成将多个TS流合成一路TS流功能通过卫星发射传输,不改变每一个码流信息。通过一个物理通路实现全透明传送到各个发射点,在传输质量和抗干扰能力方面都得到保障,高效的利用了节目网分配资源,降低传送成本。

【Abstract】 In recent years, technology of terrestrial digital broadcast system has brokenthrough, in the implementation and the popularization process of terrestrial digitaltelevision broadcasting standard, it always refers to use the terrestrial digitaltelevision single frequency network transmission. This article designs a product tosuit for a variety of transmission methods for single frequency network transmissionspecifically to improve the utilization rate of the channel and save the spectrumresources, it calls ASI Combiner.ASI combiner is mainly composed of two parts, a control system and acombiner. This paper has designed the hardware part of the control system and thecombiner and chose based on ARM Cortex-M3kernel STM32F107RCT6chip asthe main control chip of the product. There is a Ethernet MAC controller in the chip,so it can realize the function of webpage control of the combiner. The peripheralcircuit of the main control chip contains reset circuit, power supply circuit, JTAGdebug circuit, clock circuit and so on. EEPROM memory circuit is designed byAT24C64chip, Circuit of Ethernet controller and the interface is designed byDP83848chip and HR911105chip. The paper designs the key circuit, LCD circuitand the load switch circuit of LCD to realize the key-press function of the combiner.The Combiner chooses the Cyclone II FPGA series EP2C8as the core function of thechip. The receiver and transmitter are designed by CY7B933/923chip.This paper completes the program of the combiner control system code with theC language in MDK compiler environment. It realize the real-time monitoring of thecode rate and the combiner webpage control by transplanting LwIP protocol,moreover it adds other functions such as Password modification, IP addressmodification. The paper designs the function of combiner key control for theconvenient operation, it controls the open or close state of the combiner by changingthe key, the port number and rate can be displayed on the LCD screen. This paper also designs the SPI communication procedures, controlling the combiner port andreturning the code rate are completed by reading and writing registers. PC andcombiner man-machine interface is developed by HTML language, it displays allcombiner control function.ASI Combiner can be used in CMMB, DVB-T, DTMB and other networksystems. It uses the shelf structure and the1U standard chassis, it is available for thedata information transmission in Military and Civilian, it can be also used in all kindsof radar intelligence transmission. The conbiner conbines6TS Stream into1TSStream for satellite launching transmission without changing each code streaminformation. It can deliver the information to all the launcher through a physicalaccess, in the aspect of the quality of transmission and anti-jamming ability, thesystem is guaranteed, it makes full use of the program network to allocate theresource efficient, reduce the transmission cost.

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