【作者】 高耀鸿；

【导师】 曾云； 蒋爱国；

【作者基本信息】 湖南大学 ， 电子与通信工程， 2012， 硕士

【摘要】 在现代电子系统中,FIR数字滤波器以其良好的线性特性被广泛使用,属于数字信号处理的基本模块之一。在工程实践中,往往要求对信号处理要有实时性和灵活性,而已有的一些软件和硬件实现方式则难以同时达到这两方面的要求。随着可编程逻辑器件和EDA技术的发展,使用FPGA来实现FIR滤波器,既具有实时性,又兼顾了一定的灵活性,越来越多的电子工程师采用FPGA器件来实现FIR滤波器。本文首先介绍了数字滤波器的基本理论,对数字滤波器进行了分类说明,着重研究了FIR数字滤波器的基本特点和基本结构。从组成的复杂度以及实现的难易角度分析比较了多种组成结构后,确定本研究中的FIR数字滤波器将采用具有线性相位的FIR系统结构,以减少硬件资源的占用。其次对FIR滤波器的常用设计方法进行了分析说明。对滤波器进行设计,实际上就是在不同意义上对理想频率特性进行逼近。根据数值逼近方式的不同可以把设计方法分为窗函数设计法、频率采样法、等波纹逼近法等。根据这些方法的基本原理,提出了滤波器设计时采用不同设计方法所对应的基本步骤以及这些设计中存在的技术难点,为之后的具体设计提供了理论依据。基于这些分析和讨论,确定了FIR滤波器设计将采用窗函数法进行。接着对基于FPGA的FIR滤波器实现方法进行介绍,并选用分布式算法为滤波器的硬件实现方法。针对分布式算法中查找表规模较大的缺点,本文利用FIR线性相位滤波器的对称性,通过对查找表的分割对分布式算法进行改进,可以使查找表的规模得到极大的减小。基于上述理论,设计了一个18阶低通FIR数字滤波器。通过MATLAB对滤波器系数进行了提取,并对将要实现的滤波器功能进行了验证。在后续硬件电路设计中采用了层次化、模块化的思想,将整个系统划分为几个小的功能模块,利用硬件描述语言进行各个功能模块的设计,最终完成了FIR数字滤波器系统的设计。采用Quartus II软件对顶层模块进行综合与仿真,并应用MATLAB对仿真结果进行分析,证明了设计的FIR数字滤波器功能完全正确。更多还原

【Abstract】 In the modern electrical systems, the finite impulse response (FIR) digital filter, as a basic module of digital signal processing, is employed in many practical applications due to its good characteristic of linear phase and small phase distortion. In engineering practice, signal processing is often required to have the properties of real-time and flexibility. However, FIR digital filter’s implementation only by software or hardware technique is difficult to satisfy the both demands. Along with the development of Programmable Logic Devices (PLD) and Electronic Design Automation (EDA) technology, the implementation of FIR filters based on Field Programmable Gate Array (FPGA) becomes an issue of research interest, as it not only meets the real-time requirement, but also has some flexibility.In this paper, followed with the classification of the digital filters, the basic theory of digital filters was first introduced. The features of different filters were analyzed, and the basic characteristics and the structure of the FIR digital filter was specially illustrated, by which the scheme that in this research FIR with the linear phase would be employed to minimize the hardware resources occupation was determined.Secondly, several methods to design FIR filters were illustrated. The design of filter is in fact the approximation of the ideal frequency response in different ways. According to the different approximation ways, the design methods can be classified into window method, frequency sampling method, and equal ripple approximation method. Based on the principle of each method, the basic steps of the design were proposed and difficulty in the design was addressed, providing the theoretical support of the subsequent design. By the analysis and discussion, the scheme that the window method would be employed to design the low pass filter was confirmed.Thirdly, the methods of implementing FIR filter using FPGA were firstly introduced and the distributed arithmetic algorithm was employed as the scheme of hardware implementation for the filter. To scale down Look-up-Table (LUT) in the distributed arithmetic algorithm and improve the performance of the filter, the LUT was separated based on the symmetry of linear FIR filter.Based on the above discussion, an18order low-pass filter was successfully designed in Chapter5. By using a hierarchical, modular idea in the design, the whole system was divided into several smaller functional modules, which was designed with Hardware Description Language (HDL). Each of the functional modules was synthesized and simulated with Quartus II. And also the result of the simulation was analyzed with the use of MATLAB, and it indicated that the goal of the design has been achieved.更多还原