【作者】 杨光；

【导师】 郝燕玲；

【作者基本信息】 哈尔滨工程大学 ， 导航、制导与控制， 2011， 硕士

【摘要】 直接序列扩频超宽带(DS-UWB)系统采用低占空比的窄脉宽脉冲序列传输信号。在对其伪码进行同步捕获时,需要在很短的时间内同时完成码元定时捕获和伪码相位捕获。传统的同步捕获算法很难完成这一快速捕获要求。为了解决这一问题,本文研究将迭代消息传递算法(iMPA)应用于DS-UWB系统,实现伪码序列的快速捕获,并对该算法进行FPGA实现。本文首先介绍了直扩系统基本原理、UWB基本原理,在此基础上给出了DS-UWB系统的数学模型和工作原理,为后文的研究奠定了基础。其次,介绍了基于因子图的iMPA算法,详细分析了iMPA算法在m序列捕获中的应用原理。为了进一步提高iMPA算法的捕获性能,本文从因子图的结构入手给出了基于冗余因子图的iMPA算法和基于隐藏节点因子图的iMPA算法,并对它们的捕获性能分别进行了仿真分析。仿真结果表明,采用冗余因子图的iMPA算法能够有效提高捕获概率,加快算法收敛速度；因子图含有隐藏节点的迭代捕获方法与因子图不含隐藏节点的迭代捕获方法相比,捕获时间降低了一倍。再次,针对码元定时误差对DS-UWB系统iMPA算法的影响,本文采用了一种两级结构的伪码迭代捕获方法(TS-IA):首先在发射信号中加入周期性的定时捕获辅助脉冲序列,然后在同步捕获阶段的第一级结构中利用本地辅助脉冲序列模板对接收信号进行滑动相关快速获取定时同步信息,消除码元定时误差,完成码元定时捕获；在第二级结构中利用iMPA算法对伪码相位进行快速捕获。本文对此算法从捕获概率和捕获时间两方面进行了理论分析与仿真验证,仿真结果证明此算法可以实现DS-UWB系统伪码的快速捕获。最后,本文对TS-IA算法进行了FPGA实现。在实现的过程中,按Ts-IA算法的功能将其划分为了码元定时捕获模块、iMPA算法模块、相关与判决模块。在QuartusⅡ软件中分别对各模块进行设计实现,并利用ModelSim软件对各模块进行功能仿真,然后在QuartusⅡ软件中将各模块按照自下而上的方式搭建起来,完成整个算法的设计与实现。更多还原

【Abstract】 Direct Sequence-Ultra WideBand (DS-UWB) systems use low-duty-cycle pulse trains having very short impulse duration to transmit signals. In the PN code acquisition stage, both the time acquisition and PN code phase acquisition must be achieved within the allowable time limits. The traditional acquisition schemes can not realize the requirement of rapid acquisition.To deal with this problem, the iterative message passing algorithms (iMPA) applied for PN code acquisition in DS-UWB systems is researched in this paper, which can satisfy the desire of rapid acquisition and its FPGA implementation is also given.Firstly, the basic principles of DS systems and UWB systems are introduced in this paper, and the mathematic model and the working principle of DS-UWB systems are also researched in this paper, which lay the foundation for the following research.Secondly, the iMPA based on factor graphs are introduced in this paper. And the rapid acquisition scheme based on iMPA for m-sequences is particularly reasearched. To further improve the acquisition performance of iMPA, the iMPA based on redundant factor graphs and the iMPA based on hidden variable factor graphs are given in this paper from the aspect of considering the configuration of the factor graphs, and the simulations of their acquisition performaence are also given.The simulation results show that the iMPA based on hidden variable factor graphs can advance acquisition probability and quicken the speed of astringency; the acquisition time of the iMPA based on hidden variable factor graphs is half of the acquisition time of the iMPA based on factor graphs whitout hidden variable.Thirdly, to deal with the problem of the influence of timing error on the iMPA a two-stage iterative acquisition (TS-IA) scheme for PN code in DS-UWB systems is shown in this paper:First of all, the periodic pulse trains for timing acquisition are joined into the transmitted DS-UWB signal. And in the first stage of the synchronization, the timing information is acquired by correlating the received signal with a replica of the periodic pulse trains, after that the problem of timing error is solved when timing acquisition is finished, and in the second stage the rapid PN code acquisition can be carried out using the iMPA. The performance of this two-stage iterative PN code acquisition scheme is analysed and simulated in terms of both the acquisition probability and the achievable mean acquisition time in this paper. The simulation results verify that the proposed scheme can realize the rapid PN code acquisition in DS-UWB systems.At last, the FPGA implementation of TS-IA algorithm is given in the paper. The TS-IA algorithm is divided by its function into timing acquisition module, iMPA module and correlation-decision module. Detailed designs and implementations of each module are carried out in Altera’s QuartusⅡsoftware. Testings of each module are also carried out in the ModelSim software. Finally, all these modules are joined together from the bottom to the top to finish the design and implementation of proposed PN code acquisition algorithm in Altera’s QuartusⅡsoftware.更多还原