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RF LDMOS功率晶体管特性表征

Characterization of RF LDMOS Power Transistors

【作者】 张文敏

【导师】 张为;

【作者基本信息】 天津大学 , 微电子学与固体电子学, 2012, 硕士

【摘要】 RF LDMOS功率晶体管以其低成本、高性能的优势,在射频功率领域中的应用日渐突出。晶体管的射频性能主要由其内部的寄生参数决定,这些寄生参数影响器件的关键性能指标,如线性度、增益和噪声系数等。深入研究这些参数与器件结构之间的关系,有助于预测寄生效应产生的原因,以及如何在器件设计中尽量减少这些寄生效应,优化器件性能。本文基于静电势的抛物线近似,通过求解p-外延层和n-漂移区的二维泊松方程,建立了具有法拉第屏蔽罩的射频LDMOS功率晶体管漏源击穿电压解析模型。与已发表模型相比,由于泊松方程求解范围除了n-漂移区以外还包含p-外延层,本文中提出的模型增加了对p-外延层掺杂浓度对击穿电压影响的描述。通过模型计算结果与相应的器件数值仿真以及实验测试结果的比较,一方面验证了模型的有效性,另一方面定量分析了器件结构和工艺参数对击穿电压的影响。在此基础上,利用所得模型分析了怎样合理选择器件参数中的漂移区长度、法拉第罩长度、漂移区掺杂浓度和外延层掺杂浓度以同时优化各种器件性能指标,如击穿电压、导通电阻和反馈电容。此外,考虑到外延层电阻和电容的影响,本文给出了RF LDMOS的小信号等效电路,并通过数学推导得到了相应器件模型参数的提取方法,进而利用器件的去嵌入小信号S参数测试结果,完成了对小信号等效电路模型参数的提取工作。根据不同偏置条件下的提取结果并结合相应的器件仿真数据,我们详细分析了n-漂移区长度与法拉第罩长度等关键器件尺寸对包括源电阻、栅电阻、漏电阻、栅源电容、栅漏电容、漏源电容以及跨导等决定器件小信号和大信号功率性能的各种模型参数的影响,并据此对器件的高频大信号功率性能测试结果进行了讨论。

【Abstract】 RF LDMOS power transistors have evolved to dominate in the RF power applications owing to the advantages of low cost and high performance. The RF performance of these transistors, such as efficiency, gain and noise figure, is mainly affected by the parasitics inherent within the devices. Intensive research on the relation between the parasitics and device structure parameters helps understanding cause of the parasitics, and how to reduce their effect on practical design, thus achieving optimization of device performance.In this paper, an analytical model for the drain-source breakdown voltage of the RF LDMOS power transistor with Faraday shield is derived on the basis of the solution of 2D Poisson equation in p-type epitaxial layer as well as n-type drift region by means of parabolic approximation of electrostatic potential. The model captures the influence of the p-type epitaxial layer doping concentration on the breakdown voltage, compared to the previously reported model, as well as the effect of the other device parameters. The analytical model is validated by comparing with numerical device simulation and the measured characteristics of LDMOS transistors. Based on the model, optimization of LDMOS device parameters (drift region length, faraday shield length, drift region doping concentration and epitaxial layer doping concentration) to achieve proper trade-off between the breakdown voltage and other characteristic parameters such as on-resistance and feedback capacitance is analyzed.In addition, a new small signal equivalent model and model parameter extraction methodology for RF LDMOS power transistor are developed in this paper, including the effect of resistance and capacitance of the epitaxial layer. Parameter extraction for all model parameters is carried out based on the de-embedded small signal S parameter measurement. On the basis of the extracted results and the corresponding device simulation data under different device bias conditions, the dependence of the model parameters, such as the source, gate and drain resistances, gate-source, gate-drain and drain-source capacitances, and transconductance, on the drift region length and the Faraday shield length has been analyzed in detail. Then the conclusions drawn from the above small signal analyses have been used to discuss the measured high frequency large signal power performance of the RF LDMOS transistors.

  • 【网络出版投稿人】 天津大学
  • 【网络出版年期】2012年 08期
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