节点文献
基于嵌入式FPGA的合并单元设计
Design of Merging Unit Based on Embedded FPGA
【作者】 周勇;
【导师】 李开成;
【作者基本信息】 华中科技大学 , 电气信息检测技术, 2011, 硕士
【摘要】 随着智能电网相关技术的深入研究和发展,系列数字化、智能化的一次设备和二次设备相继出现,一些数字化变电站试点工程也投入运行,反映了电力系统的发展方向。电子式互感器较传统的电磁式互感器有着显著的优势,在变电站建设中有着广泛的应用前景,其应用的一个关键技术是电子式互感器与二次设备的接口通信问题,本文研究的合并单元就是该技术的具体实现,合并单元的出现简化了二次设备设计,对变电站内信息共享和系统集成有着非常重要的作用。本文首先分析了数字化变电站的发展前景,详细对比了电子式互感器与电磁式互感器的优缺点,结合国内外合并单元的研究应用现状,分析了IEC61850通信协议的接口特点,提出了一种基于SOPC的合并单元的设计方案,详细介绍了合并单元的各功能模块的具体实现。本文分硬件和软件两部分详细介绍了基于嵌入式SOPC技术的合并单元,采用Nios II内核处理器的FPGA平台,定制了系统相关外设,构成了一个完整的处理器系统,深入研究了合并单元的时钟同步问题,采用GPS精确对时和高精度晶振精确定时,保证了时钟同步以及采样脉冲的准确性。结合FPGA的IO接口多的特点,设计了多路数据同步接收模块,并采用FIFO数据缓冲模块和内部RAM实现12路数据的集中处理,提高了系统的集成度,采样数据由Nios II系统按照IEC61850-9-1协议组帧,采用双路以太网输出模块实现数据的快速传输,最后通过实验验证了系统的可靠性。
【Abstract】 With the great development and in-depth research in smart grid related technologies, a series of digital, intelligent primary equipment and secondary equipment gradually appears one after another, some of the pilot project of digital substation also put into operation, reflecting the development direction of power system. Electronic Transformer has more advantages than traditional electromagnetic transformer, it has a wide range of applications in the construction of digital substations, a key technology in application is the communication interface between electronic transformer and secondary equipments. The study of merging Unit is a concrete realization of the technology, the emergence of merging unit simplifies the design of secondary equipment, has a very important role of information sharing and system integration within the substation.This paper firstly analyzes the prospects for the development of digital substations, compares in detail the advantages and disadvantages between the electronic transformer and electromagnetic transformer. Secondly, it analyzes the present research status of merging unit at home and aboard, and the communication interface based on IEC61850 standard. Thirdly, it proposes a system scheme which based on SOPC technology, describes the function and implementation of each module of merging unit particular.This paper narrated a merging unit based on embedded SOPC technology in two part of hardware and software, the system platform uses Nios II processor core of FPGA, customizing system-related peripherals to form a complete processor system, then study of the clock synchronization problem in-depth, we use GPS and precision crystal to make sure that synchronization clock and sampling pulse is precise. Lots of IO is a feather of FPGA, it is suitable to be designed to receive multiple channels of synchronization data. Then use the internal FIFO and two-port RAM to deal with the received data, and improve the system integration. The Nios II system collects the data and make data frame in accordance with IEC61850-9-1 protocol, and then transmits the data in time through dual Ethernet modules. Lastly through the test in designed circumstance, the dissertation proves that the model’s capability meets the requirements and has high reliability.
- 【网络出版投稿人】 华中科技大学 【网络出版年期】2012年 07期
- 【分类号】TM45
- 【被引频次】1
- 【下载频次】163