【作者】 王锐；

【导师】 赵红东；

【作者基本信息】 河北工业大学 ， 电磁场与微波技术， 2011， 硕士

【摘要】 随着射频通信电路的发展,高速率、高频率的信号对射频电路提出了更大的挑战。射频功率放大器作为无线通信系统的重要模块,作用是为发射级末端的天线提供足够的功率,并抑制天线对无线系统其他模块干扰等。随着信号的频率不断提高,射频集成电路中各种寄生效应也随之增多。现在,寄生参数对射频集成电路芯片性能的影响已经不可忽视。因此,在射频功率放大器的设计中,考虑寄生参数就显得尤为重要。本文根据“基于2.4GHz无线局域网的多媒体数字会议系统”项目中功率放大器的要求和RF芯片稳定性与成本的限制,选用了TSMC 0.18um RF CMOS工艺设计了一款射频功率放大器。论文首先介绍了CMOS工艺和射频功率放大器的发展现状和技术特点;其次研究了寄生参数的产生原理及CMOS工艺中常见的寄生效应;然后重点描述了射频功率放大器的具体设计过程。电路采用三级放大结构,分为输入级、增益级和输出级。先采用负载牵引法设计了功率放大器的输出输入级匹配网络和级间匹配网络;后采用差分结构的共源共栅结构和共源放大结构设计了放大电路,并给出了性能的仿真结果和芯片版图的设计;最后完成了对版图的规则验证、电路验证和寄生参数的提取。仿真结果可知,本设计工作频率2.4GHz,工作电压3.3V,最大输出功率是19.892dBm, 1压缩点处输出功率18.92dBm ,功率附加效率为19.63%,增益为20dB,线性度良好。可以满足多媒体数字会议系统中语音传输的要求,保证音频信号不失真传输。dB更多还原

【Abstract】 With the development of Radio Frequency Communication,the signal with higher frequency and higher speed propose a greater challenge to RF circuit.RF power amplifiers as an important modules of wireless communication systems, it’s role is to provide the adequate power for transmitter antenna and to reject the interference of other modules in wireless systems. With the increasing frequency of the signal, more and more parasitic effects also will be increased in RF integrated circuits.Nowdays, parasitic parameters on the performance of RF integrated circuit chips has not be ignored.Therefore, it is particularly important to consider the parasitic parameters in RF power amplifier design.According to the need of RF power amplifier which come from the project of multimedia digital conferencing system based on 2.4GHz WLAN, and also considering the stability of RF chip and cost constraints,the paper use the TSMC 0.18um RF CMOS Technology to design a RF power ampilifier.First of all, the paper introduce the characteristics of CMOS technology and the development of RF power amplifier;Then study the general theory of parasitic parameters and the common parasitic effects in CMOS technology. At the end focus on the specific design process of RF power amplifier.The circuit adopt the third-stage amplifier structure, divided into the input stage, gain stage and output stage. First design the matching network of input and output stage and that between them using load-pull method; Second design the amplifying circuit using the cascade structure and common source amplifier based on differential structure; Third show the simulation results of performance and the design of the chip layout; Last finish the verification of layout rules and circuit, and also the extraction of parasitic.The simulation results shows that in the condition of 2.4GHz working frequency and 3.3V working voltage,The maximum output power is 19.892 dBm, at ldB compression point, the PAE is 19.63% and the output power is 18.92 dBm. its power gain is 20 dB .the system linearity is well.These results indicate that the performance of improved Power Amplifier meets the design requirements of the multimedia digital conferencing system. It ensure that no distortion of audio signal transmission.更多还原