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面向AES加密的可配置处理器设计及实现
Design and Implement a Configurable Processor for AES Encryption
【作者】 王勇;
【导师】 王夏;
【作者基本信息】 天津大学 , 微电子学与固体电子学, 2010, 硕士
【摘要】 随着计算机技术和网络技术的快速发展和广泛应用,信息安全逐渐成为几们普遍关注的课题。高级加密标准(AEs)是美国国家标准与技术研究局宣布采用的数据加密标准,在安全性、简洁性、实现成本等方面与原有的对称加密算法相比具有一定的优势,具有广泛的应用前景。AEs的传统实现方式是采用DsP或AsIc方法,本文阐述一种基于传输触发架构(TTA)的可配置处理器实现AEs的方法,该方法在一定程度上达到性能与灵活性的折衷。本文首先介绍Tn架构可配置处理器的结构、硬件、指令集系统的特点,然后分析并用c语言实现AEs算法,根据在c*coreC310上的统计结果,分析出关键路径,将字节乘法转化为查表运算。其次,重点论述了基于传输触发架构和超长指令字(vLIw)指令结构的AEs算法并行优化方法:将密钥扩展与轮变换并行实现,综合轮变换整个过程简化数据流,并根据特殊运算定制功能单元、指令集。设计自动化是可配置处理器设计的一大难点,也是可配置处理器能够被广泛使用的必要条件。本文还重点讨论基于TTA架构处理器的RTL代码及可配置汇编器自动生成的方法。通过采用本设计实现的RTL代码自动生成软件及汇编器,自动生成了用于AEs加密的可配置处理器的RTL代码及特殊指令集汇编器。最后在仿真软件和FPGA上完成验证,结果表明进行128-bit明文,128-bit密钥的AEs加密,吞吐率为18Mbps,其性能优于一般通用处理器和DsP。由于自动生成技术,其设计周期比AsIc短,设计难度比ASIC低,而且由于采用特殊的TTA架构实现加密算法,具有抗攻击特点。但与AsIc设计相比,在速度上还存在一定差距。因此,此领域存在广阔的研究空间。
【Abstract】 With the rapid development and wide application of computer technologies and network technology, information security gradually becomes an interesting subject. National Institute of Standards and Technology announced Advanced Encryption Standard(AES) as data Encryption Standard, which has certain advantages over original symmetric encipherment algorithm in security, conciseness, cost, and have widespread application prospect. Traditionally, AES was implemented based on the DSP or ASIC. This paper states a method of implementation based on the Transport Trigger Architecture(TTA) configurable processor. To some extent, this method makes the compromise between performance and flexibility.Firstly, this paper describes the architecure, hardware and instruction set system of TTA configurable processor. Afterwards, AES algorithm is analyzed and implemented by c language. According to statistic on C*Core C310, Byte Multiplication is transformed to looking up table. Secondly, parallel optimization methods of AES algorithm based on TTA and very long word is discussed, which are parallel implementation of Key Expansion and Round, simplifying dataflow of Round, customizing function unit and instruction set according to special operation. Automation is one of the most difficulties of configurable processor design, and necessary condition of widespread use of configurable processor. This paper lays stress on auto-generation method of RTL code and configurable assembler based on TTA. RTL code and assembler of special instruction set for AES encryption was auto-generated by RTL auto-generation software and assembler. Finally, results from software and FPGA verification show that for 128-bit plaintext, 128-bit cipher key AES encryption, the throughput is 18Mbps, which is better than general processors and DSP. Because of auto-generation technique, it is shorter and easier than that in ASIC. Because encryption algorithm is implemented by software, it can against attack, but there is certain gap with speed that in ASIC. Thereby research space is so much in this area.
【Key words】 Advanced Encryption Standard; Transport Trigger Architecure; Configurable Processor; Very Long Word; Parallel Optimization; Against Attack;