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USB IP物理层接口验证的研究与实现

Rearch and Implementation about Verification for USB IP’s Physical Layer Interface

【作者】 胡瑾

【导师】 庄奕琪; 苏伟军;

【作者基本信息】 西安电子科技大学 , 软件工程, 2010, 硕士

【摘要】 随着集成电路设计规模的不断增加,芯片的验证工作将成为设计中的瓶颈。虽然各种新的验证方法层出不穷,但是理论不能直接应用于工程中。验证更多属于工程实践经验,所以根据不同的IC产品选取合适的验证方法是值得研究的课题。USB(Universal Serial Bus)是一种快速、双向、同步的串行接口。USB IP包括链路层和物理层,是国微电子股份有限公司SOC设计中的一个重要模块。基于UTMI(USB Transceiver Macrocell Interface)协议的USB IP物理层接口(PHY, Physical Layer Interface)是连接集线器和USB控制器的标准接口。可实现并/串转换、比特填充、NRZI编码以及串/并转换、比特剔除和NRZI解码等功能。基于FPGA(Field Programmable Gate Array)的验证平台具有灵活性、易用性和可重用性。该验证的实现使用基于FPGA的验证平台,按照事务级验证激励产生的方法,并通过FPGA逻辑实现自动响应功能,从而完成对USB PHY的功能验证。本人在项目中提出了USB PHY的验证方法,设计实现了部分单片机软件和FPGA逻辑,并进行最终的功能测试、可靠性测试和眼图测试,对其结果做出分析。依照本文介绍的验证方法得到IP核的个别测试项目不能通过,根据测试结果对IP核的版图提出修改方案,最终全部测试项目顺利通过,证明了本次验证方法和实现方法的有效性。

【Abstract】 As the ASIC design size increase,the verification is one of the most important phase of the pre-silicon design. Many new verification theories have emerged one after another, but these theories can’t be used directly on projects.Verification pertains to engineering experience,how to choose the appropriate verification method for each product to abtain the greatest efficiency remains a topic.USB(Universal Serial Bus)is a fast,bi-directional,synchronization,serial interface. USB IP includes link layer and physical layer which is an important module of the SOC project of GuoWei Electronic Company.TheUSB Physical Layer Interface(USB PHY) that bases on UTMI(USB Transceiver Macrocell Interface) specification is a hard core. The USB PHY connects the hub and the USB controller,the main functions of it is convert serial data to parallel data/convert parallel data to serial data,bit stuff/unstuffy and NRZI encode/decode.The verification that bases on FPGA platform is flexible, easily used and reusable.So this paper use the FPGA platform as testbench,the design of stimulus bases on TBV(Transaction-Based Verification) and adopt FPGA logic to implement the automatic response of the function verification.The author advances the verification method,designs and implements a part of software and FPGA logic,conducts the functional test, the reliability test and the eye diagram test, at last analyses the test report.At result the IP core failed the test on some items but after modifying the layout,the IP core’s performance enhances much.The result proves that the verification is effective.

【关键词】 USB 2.0IP核物理层接口功能验证FPGA
【Key words】 USB 2.0IP corePhysical layer interfaceFunctional verificationFPGA
  • 【分类号】TP311.52
  • 【被引频次】4
  • 【下载频次】240
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