节点文献
面向多核处理器的嵌入式操作系统研究
【作者】 陈云川；
【导师】 罗克露；
【作者基本信息】 电子科技大学 ， 计算机应用， 2009， 硕士
【副题名】基于Blackfin561与μCLinux
【摘要】 本文研究的主要内容是:为了在Blackfin 561双核DSP处理器上运行μCLinux,需要对μCLinux做哪些修改。本文的视角主要集中在如下三个方面:启动过程、中断处理、cache管理。启动方面,本文完成的工作是:在A核初始化完毕之后,建立一个内核线程,这个内核线程将把B核要运行的初始化代码拷贝到适当的位置,接下来安装好处理器间中断的服务函数,最后,启动B核。B核的初始化代码是仿照A核的初始化代码修改而来的,初始化工作包括:安装B核中断服务函数,开启B核cache,保留B核私有数据区,设定时钟中断。中断处理部分主要涉及到两个中断:处理器间中断和时钟中断。本文的工作是:建立了处理器间中断所需的数据结构和实现函数。对于时钟中断,A核和B核使用相同的中断服务函数,不需要做特殊修改,因此只略做说明。cache管理方面,为了在B核上启用cache管理,完成了两项工作:增加了同时适用于两个处理器核使用的CPLB数据结构;实现了CPLB的加载和切换功能。CPLB数据结构主要涉及CPLB的表示和存储,CPLB的加载和切换主要涉及对MMR中的CPLB表的写操作和切换策略的实现。作为补充,对cache一致性和cache环境下的原子操作做了简单说明。最后,本文对最终得到的μCLinux进行了测试。采用的测试程序基于计算圆周率的BBP算法。本文给出并证明了BBP算法的正确性,然后,详细说明了将BBP算法并行化的具体方法。最后,给出了测试结果,并对结果做了分析。
【Abstract】 The main purpose of this thesis is to study what changes should be committed onμCLinux to runμCLinux on dual-core Blackfin 561 DSP. The concentration of this thesis is focused on following areas, booting, interrupting, and cache.The main work of this thesis on booting is, constructing a kernel thread after core A initialized, which will copy initializing code for core B to appropriate memory location. The kernel thread will proceed to install service routine for inter-processor interrupt, and then finally kick off core B. The initializing code for core B derives from initializing code for core A. Initializing work comprises of, installation of interrupt service routine, enabling cache for core B, reserving private data area of core B, and setting timer.Two affected interrupts in this thesis are inter-processor interrupt and timer interrupt. Data structure and corresponding functions needed by inter-processor interrupt are constructed and established in this thesis. As for timer interrupt, core A and core B share the same interrupt service routine, no special treat is needed, so we just give it a short glimpse.To enable cache on core B, two tasks are undertaken in this thesis. CPLB data structure which is suitable both for the dual cores is added. Moreover, loading and switching CPLB is implemented. CPLB data structure is involved mainly in representing and storing CPLB. On the other hand, loading CPLB means writing to CPLB table in MMR and switching CPLB means switching in and out CPLB to MMR in a given policy. Cache coherence and atomic operation under cache situation is added as supplementary.Finally, this thesis ends up with testing of the modifiedμCLinux. The adopted testing program is based on BBP algorithm for pi. We stated and proved BBP formula. Detailed scheme for parallel BBP algorithm is explained. Conclusion about the testing result is made at the end of this thesis.