【作者】 姜华；

【导师】 樊印海；

【作者基本信息】 大连海事大学 ， 电力电子与电力传动， 2009， 硕士

【摘要】 随着当今科学技术的迅猛发展,数字图像处理技术正在各个行业得到广泛的应用,而FPGA技术的不断成熟改变了通常采用并行计算机或数字信号处理器(DSP)、专用集成电路(ASIC)等作为嵌入式处理器的惯例。可编程逻辑器件(FPGA)凭借其较低的开发成本、较高的并行处理速度、较大的灵活性及其较短的开发周期等特点,在图像处理系统中有独特的优势。鉴于课题需求,本文提出了一种基于FPGA的图像采集处理系统解决方案,并选用低成本高性能的Altera公司的CycloneⅢ系列FPGA EP3C40F324为核心,设计开发了图像采集处理的软硬件综合系统。本文详细阐述了如何在FPGA中嵌入NiosⅡ软核处理器并完成图像采集处理系统功能的设计方案。硬件电路上,系统设计了三块电路板:FPGA核心处理板、图像采集卡、图像显示卡,其中通过I~2C总线对采集卡的工作模式进行配置,在采集模块控制下,将采集到的图像数据存储到SDRAM;根据VGA显示原理及其时序关系,设计了VGA显示输出控制模块,合成了VGA工作的控制信号,又根据VGA显示器的工业标准,合成VGA接口的水平和帧同步信号。逻辑硬件上,应用SOPCBuilder工具生成了FPGA内部的逻辑硬件功能模块,定制了NiosⅡIP core、CMOS图像采集模块、VGA Controller及其I~2C总线接口,系统各模块间通过Avalon总线连接起来。软件部分,在NiosⅡ内核处理器上实现了彩色图像颜色空间转换、二值化、形态学腐蚀处理及其目标定位等算法。实验结果证明了本文提出的方案及算法的正确性,可行性。更多还原

【Abstract】 With rapid development of the science and technology,digital image processing technology is developing very fast.As FPGA technology becomes mature and is going to take the position of the parallel computation or Digital Signal Processor (DSP),Application Specific Integrated Circuit(ASIC) as a new embedded system precept.Field Programmable Gate Array(FPGA) with its special characteristic of low development cost,high parallel processing speed,large flexibility and short development cycle,has its unique superiority in the image processing system.Due to the project in this article,a kind of image capture and processing system based on FPGA is proposed,the low cost high performance Altera Corporation’s CycloneⅢseries FPGA EP3C40F324 is selected as the main core,the design of the whole system including software and hardware are implemented.The way of how to insert the NiosⅡsoft processor core in FPGA,complete the image capture and processing system function and the design proposal is elaborated thereinafter.The hardware circuit is composed of three electric circuit boards:The FPGA core processing board,the image capture card,the image display board. Through I~2C the working pattern of the image capture card is initialized.Under the control of capture module,the image data captured is saved in SDRAM;According to VGA display principle and timing relationship,VGA display and output control module is designed,the VGA controlling signal is generated,also according to VGA monitor industry standard,the horizontal and frame synchronizing signal of the VGA interface are synthesized.Logically,the FPGA internal logic hardware function module is generated by using SOPC Builder.NiosⅡIP core is customized,the CMOS image capture module,VGA Controller and the I~2C bus interface are implemented. The system among various modules is connected through the Avalon Bus.In the software part,the algorithms of the color image,color space transformation, binaryzation,morphology corrosion processing and localization of target are realized in NiosⅡcore.Experimental results prove right and feasible by adopting the algorithm and scheme proposed in this paper.更多还原