【作者】 张涛；

【导师】 程旭；

【作者基本信息】 北京大学 ， 计算机系统结构， 2008， 硕士

【摘要】 北大众志863系统芯片是基于北京大学微处理器研发中心自主研发的UniCore-II微处理器实现的SoC芯片。在北大众志系统芯片的设计中,随着制造工艺的不断深入和所集成IP(Intellectual Property)数量的不断增加,用于各个IP之间互联的AHB总线越来越成为SoC性能的瓶颈。因此,总线设计在北大众志系统芯片的设计中就处在非常重要的位置。本文结合过往北大众志863系统芯片中总线的设计经验和实际应用中的需求,提出了新的总线架构。同时创新性的提出并设计了总线桥接器来提升总线频率。随后还利用北大众志SURP验证环境,提出了验证总线的方法和流程。论文的主要工作包括以下内容:根据北大众志863系统芯片的具体情况和实际应用需求,采用MemBus32和UniBus64这两条AHB总线作为整个SoC的总线架构。根据不同IP对于总线带宽和实时性的要求不一样,在MemBus32总线的设计中采用了软件可配置的总线仲裁策略,使得应用软件可以通过配置总线仲裁策略来改变总线性能。在UniBus64总线的设计中,提出了总线桥接器,以及相应的有限状态机。利用总线桥接器对主、从设备的输入信号进行寄存,以满足时序约束条件。同时,巧妙地利用AHB总线协议使寄存操作对主、从设备透明。利用北大众志SURP验证平台,通过搭建层次化的验证环境,定义粗粒度和细粒度的功能点,利用功能覆盖反馈调整激励产生等这些步骤,对UniBus64和MemBus32总线进行了全面的验证。综上所述,本文针对实际应用提出了AHB总线设计和验证的一种思路和方法。这种方法对于其他采用AHB总线的SoC同样具有参考作用。更多还原

【Abstract】 PKUnity863 is a SoC chip which is developed independently by MicroProcessor Research and Development Center of Peking University. With the technical features scaling down and increasing number of IP, the AHB bus which is used to interconnect IPs becomes the bottleneck of the chip. Thus, the bus design is very important in the SoC design.In this paper, with previous experiences, we raise a bus architecture used in PKUnity863. Also, we create and implement the bus bridge to obtain higher bus frequency. Furthermore, we make use of SURP to verify our design and detail the verification flow and methodology. The main points of this paper are as follows.1. We adopt two AHB buses (UniBus64 and MemBus32) as the bus architecture of PKUnity-II to support the real application.2. According to the different require among different IPs in bandwidth and real time response, we implement a configurable arbitration component in MemBus32 design. Through it, the application software can enhance bus performance.3. To meet the timing constraint, we innovatively create a bus bridge, which is used to register all of input signals from both bus master and slave. Consequently, we devise a finite state machine in the bridge to avoid the protocol violation.4. We pick up the SURP as our verification tools. After the construction of layered verification environment, the definition of functional point and stimuli generation based on the feedback of functional coverage, we fully validate the UniBus64 and MemBus32. To sum up, this thesis summarizes my research achievements in AHB bus design and verification. And they could be valuable to other AHB-based SoC.更多还原