【作者】 胡栋琳；

【导师】 赵明；

【作者基本信息】 清华大学 ， 电子与通信工程， 2006， 硕士

【摘要】 在无线正交频分复用(OFDM)应用中,因为射频信道是时变性和频率选择性的,所以在发送的OFDM信号进行解调之前,必须进行信道估计。基于导频的信道估计技术是一种有效的解决信道估计问题的方法,并且在最近几年得到很大重视。人们通过对不同的算法来研究基于梳状导频的信道估计方法,这些算法用来估计导频处信道和在信道处插值。基于最小平方(LS)算法或最小均方(LMS)算法用来在导频处的信道估计,而线性插值,二阶插值,时域插值等算法是用来进行信道插值。一般来说,效果越好的信道插值算法,硬件实现就越复杂。在这论文里面,我提出了两种新的基于角度的插值方法。线性角度插值比线性插值效果好,同样,二阶多项式角度插值比二阶多项式插值效果好。另外这两种算法易于用硬件实现。在宽带OFDM系统的实现中,FFT处理器是另一个重要的模块。为了满足在移动环境下高速实时的处理要求,复数乘法器是关键。基于CORDIC算法的复数乘法器结构正好满足这要求。在这篇论文里面,我提出了一种改进的复数乘法器结构,并且用FPGA实现。这种新的方法比CORDIC在一些应用例如WLAN802.11中更加节省硬件资源。更多还原

【Abstract】 In wireless OFDM applications, since the radio channel is frequency selective and time-varying, a dynamic estimation of channel must be achieved before the demodulation of the received OFDM signals. As an effective approach for solving the channel estimation problems, the pilot-assisted channel estimation technique has received considerable attention in recent years. A channel estimation method based on comb type pilot arrangement is studied through different algorithms for both estimating channel at pilot frequencies and interpolating the channel. The estimation of channel at pilot frequencies is based on LS and LMS while the channel interpolation is accomplished by linear interpolation, second order interpolation, time domain interpolation and etc. Generally speaking, the more effective channel interpolation algorithm, the more complex hardware implementation. In this thesis, two novel channel interpolation methods based on angle interpolation are presented. Linear angle interpolation gains better performance than linear interpolation, also, second order angle interpolation is more outstanding than second order interpolation. Besides, these two algorithms are easy to be realized by hardware.FFT processor is another key component in the implementation of wideband OFDM systems. The design of complex multiplier is crucial to meet the fast, real-time processing demand in a mobile environment. The structure of complex multiplier derived from CODIC algorithm just satisfies the requirements. In this thesis, an improved structure of complex multiplier is proposed and implemented by FPGA. This new method saves more hardware resources than CORDIC in some applications such as WLAN 802.11.更多还原