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视频流去块效应滤波算法的研究和硬件实现
Studyand Hardware Implementation of the Deblocking Filter Algorithm in Video Stream
【作者】 谢将相;
【导师】 王志华;
【作者基本信息】 清华大学 , 电子与通信工程, 2006, 硕士
【摘要】 近10年来,随着网络视频流的快速发展和数字电视的日益推广,一方面推动了相应的多媒体视频的普及;另一方面促使了视频编码技术得到了迅速发展和广泛应用,并且日臻成熟。在目前使用较多的视频流编解码标准中,H.264/AVC和AVS以更高的编码效率和压缩率在业界得到了广泛应用。H.264/AVC标准的压缩率大概是现有的MPEG-4的两倍,在小于1M带宽的条件下,H.264/AVC标准可达到DVD的成像质量,适于各种网络视频传输。AVS标准是支撑中国数字音视频产业发展的编解码标准,主要面向高清晰度和高质量数字电视广播、网络电视、数字存储媒体和其他相关应用,具有性能高、复杂度低、专利授权模式简单、费用低等特点。在视频流编解码系统中,图像块的预测、补偿、变换、量化,反变换,反量化等都会带来块效应。因此,引入去块效应滤波系统可以很好消除块效应地影响,平滑运动补偿、变换及量化产生的虚假边界,从而提高主观视觉效果。并且滤波后的帧用于后续帧的运动补偿预测,避免了由于虚假边界积累误差而导致的图像质量进一步降低。本论文对视频流去块效应滤波算法进行了深入研究,对视频流解码器中的去块效应滤波系统提出了一种高效率低复杂度的VLSI硬件结构,采用UMC0.18um CMOS工艺实现了针对H.264/AVC解码器的去块效应滤波算法;用FPGA对AVS解码器解码器的去块效应滤波算法的硬件结构进行了综合和验证。根据仿真结果,用ASIC实现的H.264/AVC去块效应滤波系统能在工作频率100MHz时实现HDTV(1920×1080,29fps;1280×720,66fps)的实时滤波。用FPGA实现的AVS去块效应滤波系统在工作频率35MHz时即能实现HDTV(1920×1080,43fps)的实时滤波。
【Abstract】 In the recent 10 years, the multimedia video are developed very quickly with the quick development of network video stream and with the increasing popularity of digital TV. On the other hand, video encoder technology has been improved significantly and applied widely.Nowadays,as lots of video stream encoder and decoder standards are used worldwidely, H.164/AVC and AVS are almost the top two standards in the area of compression and encoder efficiency. The compression efficiency of H.264/AVC standard is about two times of that of MPEG-4. Under the condition of bandwidth less than 1M, H.264/AVC standard can achieve the imaging quality of DVD, and be suitable for network video transmission. AVS is a project towards to an open and cost-efficient Chinese national standard. Its applications are very popolar such as HDTV, high-quality digital broadcast, IPTV, digital multimedia, etc. It is best suitable in China as a result of its high-quality, low-complexity, low-price, and simple to license the package of all central patents in low price, etc.The blocking artifacts can occur from block-based processing, such as block-based prediction, motion compensation, transformation, quantization and its inverse process in video stream encoding and decoding system. Therefore, adopting deblocking loop filter can remove these blocking artifacts and achieve much better subjective and objective visual quality and to degrade the distortion in the boundaries of blocks. It can also decrease the accumulation errors between frames.The algorithm of video stream deblocking filter is deeply studied in this paper. The efficient VLSI architectures are proposed for the deblocking filter. Filtering order and memory layout are carefully designed to optimize the processing speed and on-chip memory cost. The performance and cost of each architecture was systematically discussed. For H.264/AVC decoder, this deblocking algorithm is implemented by ASIC flow(UMC 0.18um CMOS Technology). But for AVS decoder, we use FPGA flow to synthesize and verify the hardware architecture of deblocking filter.This paper proposed the deblocking loop filter system in H.264/AVC and AVS decoder. From the result of simulation, the deblocking filter system in H.264/AVC can easily achieve the real-time deblocking of High-definition TV video application(1920×1088@29Hz;1280×720@66Hz) ) when worked at 100MHz, but for AVS, only when worked at 35MHz, the system can support the real-time deblocking of HDTV video application(1920×1088@43Hz).
【Key words】 Video stream; H.264/AVC; AVS; Blocking artifacts; Deblocking filter;
- 【网络出版投稿人】 清华大学 【网络出版年期】2007年 06期
- 【分类号】TN919.81
- 【下载频次】261