【作者】 蒋俊华；

【导师】 张伟风；

【作者基本信息】 河南大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 随着微电子技术和EDA技术的发展,大规模可编程逻辑器件PLD(Programable Logic Device),现场可编程逻辑门阵列FPGA(Field Progamable Gate Array)完全可以取代大规模集成电路芯片,实现数字电路系统设计的功能。尤其现场可编程逻辑门阵列FPGA兼具可编程逻辑器件PLD的现场可编程性,以及集成度高的优点,受到工程界高度的重视。I~2C总线以接口简单,成本底,可扩展性好在数字系统中得到了广泛的应用。硬件描述语言是数字系统高层设计的核心,是实现数字系统设计新方法的关键技术之一。本课题正是利用Verilog HDL语言在FPGA上实现I~2C总线控制器的功能。首先研究了I~2C总线的规范,又简要介绍了QuartusⅡ设计环境和设计方法,以及FPGA的设计流程。在此基础上,重点介绍了I~2C控制器的总体设计方案,详细描述时序状态机的工作原理和Verilog HDL语言的实现,以及在QuartusⅡ平台上的时序仿真。本系统采用了自顶向下的设计方法,利用了Verilog HDL语言的结构描述风格,把整个设计分成6个模块,时钟分频模块,寄存器组模块,数据接收模块,数据发送模块,输出缓冲模块,时序控制模块,顶层模块也采用语言描述。以Altera公司的cyclone II系列的EP2C35器件为载体,设置相应的参数,在QuartusⅡ开发平台上,实现系统的功能和时序仿真。更多还原

【Abstract】 With the development of microelectric and EDA (electronic design automation) technology, large scale integration circuit can be replaced by PLD (programmable logic device) and FPGA (field programmable gates array) which can realize the function of digital circuit system design. FPGA have the merit of filed programmability and High integration rate, therefore is highly recognized for engineering. I~2C bus is widely applied in the digital system as simple interface, expedient use, low cost and good expansibility. Verilog HDL is considerd as a core of digital system design and a key technique of implement digital system.The design realizes the function of I~2C bus interface on the FPGA. At first the thesis deeply research I~2C bus specification, then briefly introduce the Quartus II design environment and the design method, as well as FPGA design flow. In this foundation, I~2C bus controller design scheme, operational principle of the timing state, the realize of verilog HDLl and the timing simulation under Quartus II is particularly introduced. The system uses a top-down design methodology and the structure-describing style of Verilog language, it is divided into 6 module, I~2C_clock module, I~2C_greg, I~2C_rreg module, I~2C_wreg module, I~2C_buf module and I~2C_tcon module. The top module is described by RTL level. In order to test the function of the system, simulation environment is set .based on the cycloneⅡseries production EP2C35 developed by ALTERA company, the project realize functional and timing simulation in the Quartus II development platform.更多还原