节点文献
基于FPGA的SDRAM控制器设计及应用
Design of SDRAM Controller and Its Application on FPGA
【作者】 杨映辉;
【导师】 李东仓;
【作者基本信息】 兰州大学 , 粒子物理与原子核物理, 2007, 硕士
【摘要】 在国家重大科学工程HIRFL-CSR的CSR控制系统中,需要高速数据获取和处理系统。该系统通常采用存储器作为数据缓冲存储。同步动态随机存储器SDRAM凭借其集成度高、功耗低、可靠性高、处理能力强等优势成为最佳选择。但是SDRAM却具有复杂的时序,为了降低成本,所以采用目前很为流行的EDA技术,选择可编程逻辑器件中广泛使用的现场可编程门阵列FPGA,使用硬件描述语言VHDL,遵循先进的自顶向下的设计思想实现对SDRAM控制器的设计。论文引言部分简单介绍了CSR控制系统,指出论文的课题来源与实际意义。第二章首先介绍了存储器的概况与性能指标,其次较为详细介绍了动态存储器DRAM的基本时序,最后对同步动态随机存储器SDRAM进行详尽论述,包括性能、特点、结构以及最为重要的一些操作和时序。第三、四章分别论述本课题的SDRAM控制器硬件与软件设计,重点介绍了具体芯片与FPGA设计技术。第五章为该SDRAM控制器在CSR控制系统中的一个经典应用,即同步事例处理器。最后对FPGA技术进行总结与展望。本论文完整论述了控制器的设计原理和具体实现。从测试的结果来看,本控制器无论从结构上,还是软硬件上设计均满足了工程实际要求。
【Abstract】 High-speed data acquisition processing system is necessary in national great science engineering HIRFL-CSR(Heavy Ion Research Facility at Lanzhou-Cooler Store Ring) control system.The control system usually use cache memory as data buffer. SDRAM (Synchronous Dynamic Random Access Memory) is the best choice with the characteristic of high integration, low power, high reliablity, strong function. But SDRAM has complex time sequency. In order to reduce the cost, we design and realize SDRAM controller by using very popular EDA technology at present, choosing FPGA(Field Programmable Gate Array) used widely in the programmable logical device, using hardware description language VHDL (Very High Speed Integrated Circuit Hardware Description Language) and following advanced top-down design idea.The introduction outlines the CSR control system and points out the origin of the topic and its practical significance. The second chapter firstly introduces the survey and the performance target about memory, secondly describes the basic time sequency of DRAM in detail, finally discusses SDRAM exhaustively, including performance, characteristic, structure as well as some important operations and time sequency. The next two chapters separately discusses hardware design and software design about this topic and introduces the concrete chips and the FPGA design technology with emphasis. Chapter Five prestents its classical application, namely synchronous event processor of the SDRAM controller used in CSR control system. Finally summarizes this article.In the article we discuss mainly on the design principles and the ways of implementation. By the analysis of the testing results, the control system is approbated.
【Key words】 CSR; SDRAM; FPGA; VHDL; Synchronous Event Processor;
- 【网络出版投稿人】 兰州大学 【网络出版年期】2007年 04期
- 【分类号】TP21
- 【被引频次】70
- 【下载频次】2383