一种双端输出升压型DC/DC芯片的设计

【作者】 王海时；

【导师】 张波；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 便携式设备功能的增多使得其对电源管理芯片的需求不断增加,多个单一功能的电源管理芯片组合的方法渐不可行,提高集成度,在小的芯片上集成更多功能特性是大势所趋。在此背景下,本文设计了一种双端输出升压型DC/DC芯片。芯片集成两个升压变换器,提供两种不同的输出,既可以为主显LED提供恒定电流,也可以为次显OLED提供恒定电源。两个升压变换器采用不同的控制方式:主显采用峰值电流控制脉冲宽度调制(PWM),以减小纹波,加快负载响应速度;次显采用跳周期调制(PSM)以提高效率。芯片采用UMC 0.6μm BCD工艺制程,在输入电压为2.7～5.5V的范围内,主显可以以20mA电流驱动5个LED,次显可以提供20V/50mA输出,典型效率都在80%以上。1.1MHz的开关频率实现了简易的滤波和快速的环路响应性能。三个内部集成的功率MOS管,使芯片使用少的外部元器件并可以随时关断主、次显。同时该芯片具有电源欠压保护、输出过压保护、过温保护和每个周期的电流限制等功能。芯片主要用于时尚手机、白色LED背光和数码照相机等。论文首先介绍了高集成度高效率电源管理芯片的国内外动态和科研意义。然后分析了Boost电路和峰值电流控制PWM的基本工作原理,为系统设计奠定了理论基础。从设计要求的角度出发提出了整体电路的架构设计,阐述了整体工作原理和子模块功能。根据整体电路的功能要求完成了子电路的设计和H-SPICE仿真,设计的子模块包括:振荡器和斜坡补偿、误差放大器、功率管P 1和N 1的驱动电路。最后对芯片整体功能、典型性能参数和系统稳定性进行了仿真验证。仿真结果均达到或优于预定指标,证实了理论分析的正确性。本文是电路设计理论和仿真实践相结合的结果,在设计高集成度高效率芯片上具有可参考性。更多还原

【Abstract】 With the increase of PDA’s function, the requirement of power management chips becomes more and more. It is not economical to combine many chips on PCB, an alterative way is to integrate more functions on one chip. Under this condition we designe a dual step-up DC/DC transform chip. The chip includes two step-up convertors, it could provide two different outputs: The main-display is designed to drive up to 5 white LEDs with constant current while the sub-display is designed to power an organic LED display with constant voltage. Two convertors use different control methods, main-display in peaking current pulse width modulation(PWM) mode operation for low output ripple and fast response while sub-display in pulse skip modulation(PSM) mode operation for high efficiency .The chip is based on UMC 0.6μm BCD process. With wide input voltage range from 2.6V to 5.5V, it could drive up to 5 LEDs at 20mA and 4 LEDs at 30mA for main-display and up to 20V at 50mA for the sub-display. High efficiency up to 80% can be obtained. High frequency (1.1MHz) allows easier filtering and faster loop performance. Three bulit in power MOS transisitors could cut off main-display or sub-display and allowed the chip to use less external components. The chip has under voltage protection, over voltage protection, over temperature protection and cycle-by-cycle current limit. It is suitable for Flip-phones/Clam-shell Cellular Phones, Handheld Devices, High-fashion cellular phones, White LED Backlighting, Digital Cameras.In this thesis, the development and research value of high integration and high efficiency power management chip were given firstly. Then, basic principles of boost conventer and peaking current control PWM mode were discussed. The whole chip diagram was proposed according to the design specification and the whole chip operational principle was introduced. Based on the whole chip function requirements, sub-block design and simulation were completed, including oscillator and slope compensation, error amplifer, P1 and N1 driver. At last, the whole chip function simulation, typical performance characteristics and loop stability simulation were presented. The simulation results indicate that the chip has achieved the design specification. This thesis is a production of circuit principles and simulation practice and has good reference on the design of high integration and high efficiency circuit.更多还原