硅基片上螺旋电感建模及其在射频芯片中的应用

【作者】 任军；

【导师】 杨谟华；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 近年来，无线通信飞速发展的市场对重量轻、体积小、功耗低、成本低的收发器的大量需求以及微电子技术的不断进步，使得硅基片上螺旋电感作为射频集成电路的重要器件成为了当今科技研究的热点。在大量文献调研的基础上，本文总结了片上电感的研究现状与发展态势，归纳了片上电感RLC模型的三种类型，研究了它们的建立思想和原理，总结了它们的优点及不足。本文详细论述了片上电感感值的主流算法—Greenhouse分段叠加算法、Jenei整体平均值算法的建立思想和原理，用这两种算法分别推导了片上方形螺旋电感自感值、互感值以及总感值的表达式，并总结了这两种算法各自的优缺点。本文采用电磁场理论详细论述了硅集成电路中的高频效应一趋肤效应，邻近效应和衬底涡流损耗效应的产生机理及物理意义，模拟并分析了高频效应对片上电感电感值和电阻值的影响，研究了片上电感金属层涡流效应和衬底涡流效应的经典模型，并总结了它们各自的优缺点。在此研究基础上，基于电磁学和电路理论，结合部分元等效电路法和耦合变压器法，自主提出了一种新的硅基片上螺旋电感等效电路模型。该模型采用MATLAB编程实现，并应用全波电磁场仿真软件HFSS和经典模型对结构和工艺参数不同的电感进行模拟，将它们的模拟结果相对比，得到以下结果：在20GHz范围内由该模型导出的等效电感L_eft、等效电阻R_eff和Q值与全波三维电磁场仿真结果相比，误差在8％以内。证明该模型具有足够高的精确度，并且由于其效率远高于全波仿真法，在螺旋电感的优化设计中将更适用。最后，基于TSMC 0.35μm CMOS工艺采用本文提出的片上电感模型设计了以2.4GHz为中心频率的窄带低噪声放大器，并利用Cadence中的Spectre RF对LNA的主要性能指标进行了模拟仿真，得到的结果如下：2.4GHz时LNA的S₁₁=-31dB，$₂₂=-42dB，$₂₁=11dB，S₁₂=-46dB，噪声系数为3.1dB，三阶输入交调点为433mdBm，1dB压缩点为-12dBm，总功耗约为8mW，满足了设计提出的指标要求。更多还原

【Abstract】 Recently, the rapid developmental market of wireless telecommunication needs eagerly transceivers with light weight, small bulk, low cost and low power dissipation. Also, the technology of microelectronics progresses continuously. So silicon-based on-chip spiral inductor has received more and more international attention as it is a crucial element to radio-frequency intergrated circuit （RFIC）.Based on referring to many papers, this paper summarizes the investigation status quo and development directions of on-chip inductor, sorts out three kinds RLC model of on-chip inductor, analyzes their modeling ideas and theories, and compares their merits and defects.This paper discusses in detail the modeling ideas and theories of classical Greenhouse and Jenei algorithms which calculate the inductance of on-chip inductor, educes the inductance expressions with the two algorithms and then concludes their merits and defects.This paper discusses in detail the generant mechanisms and physical meanings of skin effect, proximity effect and eddy current loss in high frequency by electromagnetic theory, analyzes their influence on inductance and Q, studies the classical models which simulate the inductance of on-chip inductor, and then concludes merits and defects of these models.Based on the aforementioned study, a novel silicon-based on-chip spiral inductor model is proposed, in which functions of both skin effect, proximity effect and eddy current losses in the substrate are accounted in the light of modified partial equivalent element circuit（PEEC） methodology and a full-coupled transformer loop. Inductors with different geometric dimensions or different technology parameters are chosen to verify the accuracy of the model. The simulated data of inductors from full-wave electromagnetic filed simulator （HFSS） and the model of this paper are compared. The results show that up to 20GHz, the model presented in this paper reveals quite good accuracy within 8% with data from HFSS. As the model presented in this paper is sufficient accurate and much more efficient than full-wave electromagnetic filed simulation, it is competent for the design and optimization of spiral inductors.Lastly, based on a TSMC 0.35um CMOS process, spiral inductors which are proposed by model of this paper is used to design the presented CMOS low noise amplifier （LNA） circuit. The center frequency is 2.4GHz. The LNA performance is simulated by Spectre RF in Cadence EDA software. From the simulation results, under 2.4GHz operation frequency, the LNA achieves power gain(S₂₁) of 11dB, input reflection coefficient(S₁₁) of -31dB, output reflection coefficient(S₂₂) of -42dB, reverse isolation(S₁₂) of -46dB, noise figure（NF） of 3.1dB, input third-oreder intercept point（IIP3） of 433mdBm and input 1dB compression point of -12dBm. The total power dissipation is 8mW.更多还原