【作者】 薛兆丰；

【导师】 李智群；

【作者基本信息】 东南大学 ， 电路与系统， 2006， 硕士

【摘要】 随着Internet的迅猛发展,人们对信道带宽的要求呈爆炸性增长。越来越多的网络设备如Router、ATM、光交叉连接设备(OXC)以及DWDM等被置于运营商的同一个机房中。由于超高速数据连接的需要,这些设备之间一般采用光互联,并且连接距离较短(600m以内)。因为长距离光传输技术成本较高,所以在短距离内采用长距离光传输技术显然不合适。而具有较高性价比的甚短距离(VSR)光传输技术是这种应用情况下的最好选择。作为光接收机的关键部分,前置放大器的性能在很大程度上决定了整个光接收机的性能。在高速光纤传输系统中,广泛采用互阻前置放大器。主放大器有两种实现方式:自动增益控制放大器和限幅放大器。由于限幅放大器具有设计简单、功耗低、芯片面积小和外接元件少的优点,本文选择限幅放大器的形式来实现光接收机的主放大器。本文采用TSMC 0.25μm CMOS工艺实现了基于VSR4-1并行光接收机前端放大电路设计。前置放大器采用了改进型共源跨阻结构,在满足电路工作带宽的同时,优化了电路的噪声性能。限幅放大器采用有源负载基本放大单元。根据理论分析优化设计,并通过实际模拟,取得了较优的增益、带宽、噪声和功耗性能。本文采用TSMC 0.18μm CMOS工艺实现了基于VSR4-1及VSR5并行光接收机前端放大电路设计。前置放大器采用了RGC结构,克服了CMOS光检测器大寄生电容造成的带宽不够的问题。限幅放大器采用了改进型Cherry-Hooper放大单元。根据理论分析优化设计,并通过实际模拟,取得了较优的增益、带宽、噪声和功耗性能。文章按照电路设计、版图设计、流片至芯片测试的顺序详细介绍了上述电路的设计过程及最终的测试结果。全部电路经模拟验证符合设计要求,并送交芯片制造厂商流片。所得样片,经初步测试,性能良好。根据芯片在通路间隔离措施上的创新之处,于2005年5月提交了国家技术发明专利(申请号:200510040731.x)。受江苏省科技厅委托,省教育厅于2005年8月20日在南京主持召开了“15-30Gb/s高速并行光接收前端放大器”成果鉴定会。鉴定委员会一致通过该成果的鉴定,认为本项研究成果达到了国际先进水平。更多还原

【Abstract】 With the rapid development of Internet, broad bandwidth is on demand greatly. More and more Internet equipments such as Router, ATM, OXC and DWDM are placed together. Because of ultra high-speed transmission data, very short reach (VSR) optical transmission system is the best choice here both for performance and price considerations.As the critical role of the optical receiver, the preamplifier’s performance has great effect on the performance of the whole optical receiver. Transimpedance amplifiers (TIA) are widely used in the high speed optical transmission systems. An auto Gain Control (AGC) amplifier or a limiting amplifier is generally used to realize the main amplifier. The latter one was chosen to realize the main amplifier in our design since it has the feature such as simple topology, few external components and fast responsibility. In this paper, TSMC 0.25μm CMOS technology is used to realize the design of parallel front-end amplifiers for VSR4-1. An improved common source TIA is used in the design of pre-amplifiers, which can meet the request of bandwidth and noise performance simultaneously. Active loads amplifiers cell are used to construct the limiting amplifier. On the basis of theory analysis and design optimization, the circuit achieves high performance of gain, bandwidth, noises and power dissipation.In this paper, TSMC 0.18μm CMOS technology is used to realize the design of parallel front-end amplifiers for both VSR4-1 and VSR5. The RGC structure is used in the design of pre-amplifiers, which overcomes the inadequate bandwidth problem caused by the large parasitical capacitor of CMOS photodiode. Modified Cherry-Hooper amplifiers are used to construct the limiting amplifier. On the basis of theory analysis and design optimization, the circuit achieves high performance of gain, bandwidth, noises and power dissipation.In this paper, firstly the knowledge about VSR transmission system is introduced; subsequently the design procedure and test results are presented. According to the measurement results, the pre-amplifier, limiting amplifier and circuit are suitable for VSR application.Creative point on isolation is validated by both the theory and the measurement, so one national technology patent was applied in May, 2005, and the applied number is 200510040731.x Consigned by Jiangsu Science and Technology department, Jiangsu Education Department held the achievement appraisal meeting of 15-30Gb/s High Speed Parallel Front-end Amplifiers for Optical Receiver on August 20, 2005. The performance of chip is authenticated as the international advanced level.更多还原