分数分频锁相环频率合成器的研究

【作者】 岳金山；

【导师】 刘光祜；

【作者基本信息】 电子科技大学 ， 电路与系统， 2005， 硕士

【摘要】 随着现代通信、雷达、电子侦察和对抗技术的飞速的发展,对作为核心部件的频率合成器的性能指标提出了越来越高的要求,宽频带、高频率分辨、低捷变时间、高频率稳定度、低相位噪声、低杂散、能程控等。这些技术要求用普通的模拟电路技术是很难达到的,频率合成技术是产生大量高精度、高稳定度频率信号的主要技术。分数分频频率合成器则是近年来出现的一种新技术,它与传统的整数分频频率合成器相比具有频率分辨率高、相位噪声低等优点。本文介绍了锁相环和频率合成技术的基础理论,并对分数分频频率合成器及其实现技术进行了探讨。环路滤波器是频率合成器能稳定工作的输出低相位噪声、低杂散信号的关键部件,本文给出了环路滤波器的具体计算方法,并通过试验证实了其可行性。更多还原

【Abstract】 Today , as the electronic technology is developing fantastically fast , the request for higher performance of synthesizers is put forward , wide frequency range , high frequency resolution , low jump time , low phase noise , high spurious restraining and controlled by program .These requirements are too hard to reached by using normal analog circuit . Frequency synthesizer is the key technology to produce a great deal of high resolution , high stabilization frequency signal . Fraction-N phase locked loop (FNPLL) frequency synthesizer has been appeared in recent years . It has the advantage of high frequency resolution and low phase noise when compared with traditional Integer-N phase locked loop (NPLL) frequency synthesizer . In this paper the basic theory of phase locked loop (PLL) and frequency synthesizer technology were introduced , the theory and implement of FNPLL frequency synthesizer were discussed too . Loop filter is the key component to keep frequency synthesizer working steadily and outputting signal of excellent performance . In this paper methods of designing loop filter were given . the reliability were verified in experiment .更多还原