【作者】 吴亚联；

【导师】 段斌；

【作者基本信息】 湘潭大学 ， 电力电子与电力传动， 2004， 硕士

【摘要】 本项目是基于教育部教育管理信息中心校园卡标准化研究所密码组件泛化理论与方法的研究成果,重点解决射频IC卡等效实现金融卡规范时需要的加密芯片的优化设计问题。Rijndael算法在未来几十年里将取代DES作为主流的对称加密算法,是目前分组加密算法的最高水平反映。设计Rijndael算法的硬件加密芯片,并研究其用于金融交易中可信计算的实现方法,具有重要的现实价值,同时对于我们将来设计具有自主性的密码算法及芯片,具有重要的理论意义。本文在分析了Rijndael算法的基础上,首先讨论改进解密算法的轮变换次序和列混合变换的可行性和对硬件实现的意义。然后结合前面提出的变型算法,提出具体的加解密的硬件实现整体电路结构以及轮变换中的四层变换、控制模块、密钥扩展及输入输出模块的优化设计方法及各个模块的实现电路结构。接着用VHDL硬件描述语言对系统进行描述,以FPGA为算法载体,在MAX+plusII中进行了仿真。最后给出了该硬件加密芯片在射频卡等效实现金融卡规范实例中的应用模型。更多还原

【Abstract】 This project,based upon the research results of cryptography token generalization theory and method of the Insititute of Campus IC Card Standardization of Education Management Information Center in Ministry of Education, is mainly designed to solve the problem of optimization design of encryption chip,which is need when radio frequency card equivalent realization finance card standard .Rijndael algorithm will substitute for DES in the future several dozens years to take the mainstream of the symmetrical encryption algorithm and it represents the highest level in block cipher at present. The design for Rijndael algorithm hardware encryption chip and its utilization in the process of finacial trade have the important realistic value , simultaneously will have the important theory significance for us to design self-determination crypto-algorithm and chip in the future.On the basis of the analyzation of Rijndael algorithm, this article first argue about the feasibility of improving the decipher algorithm round transformation order and the mixcolumn transformation and then the significance of the hardware realization.Secondly ,in accordarnce with the previous transmutative algorithm,it proposed the concrete encryption/decryption hardware realization in the integrated circuit structure as well as four different transformations of round transformation, the control module, the key expansion and the input output modules optimized design method and each module realization electric circuit structure.Then uses the VHDL hardware description language to carry on the description to the system, take FPGA as the algorithm carrier, and carry on the simulation in MAX+plusII. Finally design the application model of this hardware encryption chip in radio frequency card equivalent realization finance card standard.更多还原