节点文献
ARMv7架构的中断控制结构及实验设计
Interrupt Control Structure and Experiment Design for ARMv7 Architecture
【摘要】 中断实验设计是系统化教学背景下课程衔接的重要环节。针对地方高校开展系统能力人才培养的需求,基于字长32 bit的ARMv7模型机结构,设计一个硬件中断优先级控制实验。借助自制远程可交互式FPGA实验板卡实施教学,加深学生对中断知识点的理解,为学习后继操作系统和嵌入式系统原理打下基础。
【Abstract】 Aiming at the needs of teaching of developing system design ability in local universities, a hardware interrupt priority control experiment is designed based on 32-bit ARMv7 CPU architecture. With the help of the provincial virtual simulation experiment teaching project platform, the self-made remote interactive FPGA experiment boardsare used to implement the teaching. The experiment deepens the students’ understanding of interruption knowledge, and lays the foundation for learning the design of operating system and embedded system. Interruption experiment design is an important link of course linkage under the background of systematic teaching.
【Key words】 Armv7 model machine; interrupt experiment; course connection; system design ability training;
- 【文献出处】 实验室研究与探索 ,Research and Exploration in Laboratory , 编辑部邮箱 ,2022年02期
- 【分类号】TP3-4;G642.423
- 【下载频次】119