【摘要】 针对毫米波频段下硅基CMOS晶体管的栅漏寄生电容严重影响放大器的增益和隔离度的问题,采用交叉耦合中和电容抵消其影响,设计了一款60GHz三级差分共源极低噪声放大器(LNA)。为减小级间匹配无源器件的损耗,节省芯片面积,采用变压器进行级间耦合。基于SMIC55nm RF CMOS工艺,进行了电路原理图和版图的设计与仿真。仿真结果显示,该LNA输入输出匹配良好,功率增益为21.1dB,3dB带宽为57.3~61.5GHz,噪声系数为5.5dB,输出1dB压缩点为-0.64dBm,功耗为34.4mW,芯片尺寸为390μm×670μm。更多还原

【Abstract】 A 60 GHz three-stage differential common source low noise amplifier(LNA)was proposed.Crosscoupled capacitors were utilized to neutralize the gate-drain parasitic capacitances which degraded seriously the gain and matching performance of silicon-based CMOS transistor at mm-wave frequency.Low insertion loss matching and small chip area were achieved by employing transformers to couple the different stages.The schematic and layout were designed and simulated in SMIC 55 nm RF CMOS process.The simulation results showed that the LNA achieved a power gain of 21.1dB,a 3dB bandwidth of 57.3-61.5GHz,a noise figure of 5.5dB and an output 1dB compression point of-0.64 dBm with good input and output match at 34.4mW power dissipation.The chip size was 390μm×670μm.更多还原