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基于CPLD的智能密码锁设计与实现

Design of Intelligent Combination Clock Based on CPLD

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【作者】 颉洪睿孙丹丹魏学军

【Author】 XIE Hongr-rui;SUN Dan-dan;WEI Xue-jun;School of information and Communication Engineering,Beijing University of Posts and Telecommunications;School of Electronic Engineering,Beijing University of Posts and Telecommunications;

【机构】 北京邮电大学信息与通信工程学院北京邮电大学电子工程学院

【摘要】 随着可编程逻辑器件的发展,EDA技术已成为硬件系统电路设计的重要手段。本文提出了一种基于EDA技术,采用自顶向下的设计方法,能够快速设计、开发智能密码锁的方案,并阐述了其工作原理和软硬结合的设计理念。本方案以复杂可编程逻辑器件(CPLD)为核心,配合外围电路,在Quartus II环境下,利用VHDL语言编程实现。本文详细介绍了顶层文件和子模块的设计过程,其中包含了点阵动态扫描、按键防抖、抗干扰等工程技术,并涉及系统仿真分析与优化。硬件测试结果表明:本方案所设计的智能密码锁功能丰富、操作便捷、安全性高;电路结构简单、系统可靠性高、体积小、易于维护升级、实用性强。

【Abstract】 With the development of programmable logic devices,the EDA technology has become an important means of the hardware circuit design of systems. This paper presents a design scheme which is able to quickly design and develop electron password lock based on the EDA technology and the top-down design method,and elaborates its working principles and the design method of hardware and software combination. This scheme takes the CPLD as the core. With the help of external circuit and under the Quartus II environment,the scheme is realized by using the VHDL language.The paper introduces the design process of top-level files and sub-module,which contains engineering technology,such as lattice dynamic scanning, anti-shake of button, anti-jamming and so on. It also relates to simulation and optimization. Hardware test shows that this electron password lock has the advantages of feature-rich,easy to operate,high security,simple circuit structure,high system reliability,small volume,easy to maintain and upgrade,and strong practicability.

【关键词】 密码锁CPLDEDAVHDL
【Key words】 electron password lockCPLDEDAVHDL
【基金】 北京邮电大学教改项目(00005782)
  • 【文献出处】 实验室研究与探索 ,Research and Exploration in Laboratory , 编辑部邮箱 ,2015年11期
  • 【分类号】TS914.211.7
  • 【被引频次】5
  • 【下载频次】208
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