【摘要】 高精度、高速率的时钟同步技术是现代数字通信系统实现的关键之一.以QPSK基带通信系统为例,提出了多相滤波的最大似然定时误差检测时钟同步方法,详细分析了其工作原理与设计过程,并用MATLAB进行了性能仿真.结果表明,在误码率接近10~5时,该方法与无定时偏差的相干解调相比,Eb/NO要求相差不到0.5dB,具有比较理想的性能,而且计算量较小,容易用现代DSP或FPGA予以实现.更多还原

【Abstract】 High-precision,high-speed clock synchronization is one of the key technologies for modern digital communication systems.Taking QPSK baseband communication system as an example,a clock synchronization method based on maximum likelihood synchronization error detection and polyphase filter is proposed.The operation principles and design procedures are analyzed in detail.Moreover,its performance is simulated by using Matlab.The results show that the requirement of Eb/NO of the proposed method is less than 0.5dB higher compared with coherent demodulation with ideal timing at the BER close to 10-5.Its performance is satisfactory,with less computation,and easy to realize by modern DSP or FPGA technologies.更多还原