【摘要】 针对集成电路测试数据量大、测试应用时间长和测试结构复杂等问题,提出了一种延长扫描链的串行移位测试数据生成方法。以确定性测试生成算法为基础,充分利用测试集中的无关位X,让扫描链自行移位产生测试向量完成电路的测试。对整体串行移位和分段移位两种情况进行了实验,结果表明,经此方法生成而最终需施加至待测电路的测试数据量小于其他一些经典的测试方法的;而整体移位和分段移位分别在数据压缩效果和测试时间方面各具优势。更多还原

【Abstract】 As we known,the test of integrated circuits(IC) always encounters a lot of problems,like,processing the huge test data volume,spending a long time to test,and constructing the complex test structure.The paper proposed a serial shifter method for test generation based on extension scan chains.It is on basis of FAN algorithm and makes use of don’t care bits ’X’ of test set.Scan chains can generate test vector by itself.Experiments were made for the whole scan chain and the segmentation.Results show that the proposed method can achieve less test data volume compared with some other classical method.The whole shift and the segmentation one are prevailing in compression rate and test time respectively.更多还原