A 14-bit wide temperature range differential SAR ADC with an on-chip multi-segment BGR

【摘要】 <正>A 14-bit low power self-timed differential successive approximation(SAR) ADC with an on-chip multisegment bandgap reference(BGR) is described.An on-chip multi-segment BGR,which has a temperature coefficient of 1.3 ppm/℃and a thermal drift of about 100μV over the temperature range of -40 to 120℃is implemented to provide a high precision reference voltage for the SAR ADC.The Gray code form is utilized instead of binary form mode control to reduce substrate noise and enhance the linearity of the whole system.Self-timed bit-cycling is adopted to enhance the time efficiency.The 14-bit ADC was fabricated in a TSMC 0.13μm CMOS process. With the on-chip BGR,the SAR ADC achieves an SNDR of 81.2 dB(13.2 ENOB) and an SFDR of 85.2 dB with a conversion rate of 2 MS/s at room temperature and can keep an ENOB of more than 12 bits at a conversion rate of 2 MS/s over the temperature range from -40 to 120℃.更多还原

【Abstract】 A 14-bit low power self-timed differential successive approximation(SAR) ADC with an on-chip multisegment bandgap reference(BGR) is described.An on-chip multi-segment BGR,which has a temperature coefficient of 1.3 ppm/℃and a thermal drift of about 100μV over the temperature range of -40 to 120℃is implemented to provide a high precision reference voltage for the SAR ADC.The Gray code form is utilized instead of binary form mode control to reduce substrate noise and enhance the linearity of the whole system.Self-timed bit-cycling is adopted to enhance the time efficiency.The 14-bit ADC was fabricated in a TSMC 0.13μm CMOS process. With the on-chip BGR,the SAR ADC achieves an SNDR of 81.2 dB(13.2 ENOB) and an SFDR of 85.2 dB with a conversion rate of 2 MS/s at room temperature and can keep an ENOB of more than 12 bits at a conversion rate of 2 MS/s over the temperature range from -40 to 120℃.更多还原