节点文献
基于绝热逻辑的低功耗乘法器电路设计
Low-power Multiplier Design Based on Adiabatic Logic
【摘要】 基于绝热开关理论的能量回收逻辑与传统的静态CMOS逻辑相比,能够大大减少电路的功率消耗。这里介绍了一种使用单相正弦电源时钟的能量回收逻辑,分别用静态CMOS逻辑和这种能量回收逻辑设计,并仿真了一个两位乘法器电路,比较了这两种电路的性能。研究表明,采用能量回收逻辑设计的乘法器显著降低了电路的功率消耗。
【Abstract】 Energy recover logic(ERL) based on adiabatic switching theory can greatly reduce the power consumption compared with traditional static CMOS logic.An energy recover logic using a single-phase sinusoidal power clock is introduced.A two-bit multiplier was designed and simulated for both ERL and static CMOS logic,the performance of the circuits was compared.The results show that the multiplier designed by energy recover logic can shorten the power consumption.
【关键词】 能量回收逻辑;
绝热电路;
低功耗;
乘法器;
【Key words】 energy recover logic; adiabatic circuit; low-power consumption; multiplier;
【Key words】 energy recover logic; adiabatic circuit; low-power consumption; multiplier;
- 【文献出处】 现代电子技术 ,Modern Electronics Technique , 编辑部邮箱 ,2010年12期
- 【分类号】TN79
- 【被引频次】1
- 【下载频次】58