【摘要】 给出了一种采用FPGA实现合成孔径雷达定时器的设计方案,通过合理的时钟设计,使全局时钟的畸变达到最小,保证得到高质量同步的全局时钟。同时对工作时钟采用二的幂次方分频后作为脉冲宽度和延时的调整时钟,从而保证了控制精度。实验证明,该定时器具有输出脉冲抖动小,脉冲宽度和延时控制精确,集成度高,可靠性好的优点。更多还原

【Abstract】 In this paper,a scheme of radar timer based on FPGA for SAR is given.The reasonable clock design minimizes the skew of Global Clock and gets accurate synchronous Global Clock.Meanwhile,the width and delay of output pulse is adjusted by the work clock whose frequency is divided by the designated power of 2.It has been proven that this radar timer has the merits of little pulse jitter,flexibility,integration and reliability.更多还原