【摘要】 时钟管理在FPGA设计中具有极其重要的地位,文中研究了FPGA中时钟管理器DCM的工作原理和结构。DCM具有频率综合、相移功能,能够消除时钟偏移,解决很多系统中的时钟问题。利用DCM产生的具有精确占空比的时钟信号,给出了其在DDR总线数据传输中的应用,并给出了仿真结果。更多还原

【Abstract】 Clock management is very important in FPGA design. The operating principle and the structures of DCM in Xilinx FPGAs are introduced in this article. DCM can synthesize the clock frequency, phase shift and eliminate clock skew, solving many clocking issues. The clock signal with precise duty cycle produced by DCM is used in the bus data DDR transmission.The simulation results are also given.更多还原