【摘要】 基于CMOS低功耗门控技术,设计了一种应用于ASIC中的异步状态机(AFSM).关键是将原始的同步状态机分解为若干个能够相互通信的子状态机,提高子状态机的自循环率,进而通过异步控制子状态机,达到降低功耗的目的.将该思想应用于VLSI设计实例,证明了采用这种异步状态机设计能够有效节省片上系统(SoC)的功耗最高达25%以上,并且不会过多地增加芯片面积.更多还原

【Abstract】 Based on CMOS low-power clock gating technique,an asynchronous Finite State Machine(AFSM),which is applied in ASIC design,is presented in this paper.In order to achieve low power consumption,a key method is to decompose the original FSM into a number of sub-FSMs which can communicate with each other,to increase the self-loop probability of each sub-FSM,and to control the interacting sub-FSM asynchronously.The implementation of this technique in VLSI design shows that this method leads to significant power saving up to 25% without enlarging too much area.更多还原