【摘要】 低速的存取部件一直是限制高性能微处理器性能的一个关键因素。文章提出了RISC微处理器存取部件()LSU设计中一种优化的设计模型,阐述了该模型提高存取指令执行速度的机理以及关键路径的优化设计机制,分析了该模型在改善微处理器性能中的作用,并且该模型已经成功的应用到微处理器龙腾II的设计中。Verilog仿真、综合和静态时序分析的结果表明该设计达到了良好的效果。更多还原

【Abstract】 Low-efficiency Load/Store Unit is an important factor which limits the high performance of microprocessors.This paper presents an optimal design model in design of Load/Store Unit of RISC microprocessor.This paper also introduces the mechanism of improving the executive speed of Load/Store instructions and the optimal design of critical path,analyses the function in improving the microprocessor performance.This Model is successfully used in the design of LongTeng II microprocessor.The result of Verilog simulation,synthesis and static time analysis show the design is successful.更多还原