【摘要】 提出的椭圆双步增量生成算法判别式构造简单 ,具有递归性 ,而且仅有整数加减和移位运算 ,比已有算法简单易懂 采用硬件描述语言实现算法的CPLD/FPGA原型 ,处理性能优于软件生成方法 该算法可应用于绘图仪等输出设备的矢量光栅变换器中 ,提高整体绘图速度更多还原

【Abstract】 The discriminators of algorithm obey a simple recurrence formula which may be evaluated by only integer arithmetic and binary shifts. The prove of algorithm is less complex and easier understood than existing one. The CPLD/FPGA prototype implementation is done by using HDL. The performance of hardware implementation is better than software program. The algorithm can be applied to vector to raster converter for output devices such as plotter.更多还原