【摘要】 基于 Alcatel的 0 .3 5μm标准 CMOS工艺 (VT=0 .6 5 V) ,模拟实现了工作电压低达 1 .8V、电压增益偏差仅为 3 % (整个输入共模偏置电压范围内 )的运算放大器 ;电路的设计也避免了差分输入对中 PMOS管和 NMOS管的 W/L的严格匹配 ,增强了电路对工艺的坚固性。对输入差分对偏置电流的控制电路、差分输入对的有源负载和 AB类 Rail- to- Rail输出级进行了整体考虑 ,确保电压增益恒定的新型结构 ,使该运放在 2 V电源电压下 ,电压增益达到 80 d B(1 0 kΩ 电阻和 1 0p F电容并联负载 ) ,单位增益带宽为 1 2 MHz,相位裕量 72°更多还原

【Abstract】 A constant voltage gain rail to rail amplifier with a supply of 1 8 V is implemented with Alcatel’s 0 35 μm standard CMOS technology.The whole architecture, including input, active load and output circuit, is designed carefully to realize the constant voltage gain, which varies only 3 % when input common mode voltage ranges from 0 to voltage supply.It gives the amplifier robustness in that the work doesn’t need the strict W/L matching between PMOS input pair and NMOS input pair.Simulation shows this amplifier, with a 2 V supply, achieves a voltage gain of 80 dB( loaded by 10 kΩ//10 pF ), a unit gain bandwidth of 12 MHz and a phase margin of 72°更多还原