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自对准硅化物CMOS/SOI技术研究

Self-Aligned Silicide Technology for SOI MOSFET’s

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【作者】 奚雪梅徐立武国英李映雪王阳元

【Author】 Xi Xuemei, Xu Li, Wu Gayying, Li Yingxue and Wang Yangyuan (Institute of Microelectronics, Peking Undersity, Beijing 100871)Received 10 September 1993, revised manuscurpt received 22 January 1994

【机构】 北京大学微电子学研究所

【摘要】 在CMOS/SIMOXSOI电路制作中引入了自对准钴(Co)硅化物(SALICIDE)技术,研究了SALICIDE工艺对SOIMOSFET单管特性和CMOS/SOI电路速度性能的影响.实验表明,采用SALICIDE技术能有效地减小MOSFET栅、源、漏电极的寄生接触电阻和方块电阻,改善单管的输出特性,降低CMOS/SOI环振电路门延迟时间,提高CMOS/SOI电路的速度特性.

【Abstract】 Abstract The CoSi2 self-aligned silicide(SALICIDE) process for CMOS circuits on silicon insulator(SOI) has been developed with Co rapid thermal processing technology. SALICIDE process’s influences on MOSFET’s and CMOS circuits characteristics are studied. The experiments show that by using SALICIDE process, the MOSFET’s contact resistance has been greatly decreased 9 thus output characteristics is improved. CMOS ring oscillator with a gate length of 1μm can operate at high speed with the delay time/stage of 230ps/stage at 5V.

  • 【文献出处】 半导体学报 ,CHINESE JOURNAL OF SEMICONDUCTORS , 编辑部邮箱 ,1995年04期
  • 【分类号】TN304.2
  • 【被引频次】6
  • 【下载频次】80
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