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宏单元模式分级布图规划方法

A New Approach to Hierarchical Floorplanning for Building-block Layout

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【作者】 应昌胜; 洪先龙; 王尔乾; 黄肃亮;

【Author】 Ying Changsheng/Department of Computer Science and Technology, Tsinghua University, Beijing.100084Hong Xianlong/Department of Computer Science and Technology, Tsinghua University, Beijing.100084Wang Erqian/Department of Computer Science and Technology, Tsinghua University, Beijing.100084J. S. L. Wong/Department of Electronic Engineering, Hong Kong Polytechnic, Hong Kong

【机构】 清华大学计算机系; 香港理工学院电子工程系 北京100084; 北京100084; 北京100084;

【摘要】 本文提出一个新的宏单元模式分级布图规划方法.布图规划分三个阶段进行:芯片物理分级构造、布图规划和布图规划修正.主要特点包括:松弛对布图拓扑结构的约束、模块“自然”结群构造设计物理分级、采用解析方法求解面积规划问题、基于一个新的Steiner树算法求布线规划、包含模块面积估计和布线面积估计.实验结果表明提出的方法可以在满足不同形状和I/O设计目标的同时得到很高的芯片面积利用率.

【Abstract】 A new hierarchical floorplanner for custom VLSI design is presented which allocates:space for rectangular modules and space for the wiring among the modules in a hierarchicalmanner.The system is divided into three phases:clustering with module dimension estimation,top down floorplanning, and bottom up floorplan refinement.The key novel features include:a ’natural’ clustering algorithm for design physical hierarchy,analytic models for initial pla-cement and spacing, a fast Steiner tree algorithm for global routing and performing routing-area estimation in floorplanning.Unlike other hierarchical floorplanners,no constraint isimposed on the layout topology used to construct the floorplan. The experimental results showthat the hierarchical floorplanner achieves fairly high area usage while satisfying various con-straints on aspect ratio and I/Os.

【基金】 国家青年自然科学基金
  • 【文献出处】 半导体学报 ,Chinese Journal of Semiconductors , 编辑部邮箱 ,1991年04期
  • 【被引频次】1
  • 【下载频次】18
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