【作者】 王忆；

【导师】 何乐年； 严晓浪；

【作者基本信息】 浙江大学 ， 电路与系统， 2010， 博士

【摘要】 在2007～2009年中国电源管理芯片市场产品结构调查中,低压差线性稳压器(LDO)的市场占有率一直排名第一。之所以广大消费类电子产品对LDO芯片拥有大量并持久的需求,是由于LDO芯片可以为后续电路提供稳定低噪的电压,并且只占据少量的PCB板面积和消耗极低的功耗。此外LDO的电路架构还十分适合作为IP集成到片上系统中(SoC)。随着市场的变化和技术的进步,对LDO芯片的性能要求也在不断地提高。更高的转换效率、更低的功耗、更少的外围器件以及更高的电源噪声抑制逐渐成为LDO芯片的研究热点和发展趋势。本文首先对实现高性能LDO的关键问题通过系统设计进行了分析研究,具体主要在纳安级基准电流源、LDO频率补偿方案、LDO大信号响应,以及闭环系统电源噪声传递函数四个方面进行了深入的理论研究和探讨,提出了具有创新意义的电路结构：1)30nA基准电流源；2)基于新型有源受控电阻的3种零点追踪频率补偿方案；3)4种摆率增强电路；4)基于电源噪声抵消抵消技术的4种高PSRR LDO实现方案。本文基于上述电路模块结构,采用CMOS昆合信号工艺,设计并实现了三款高性能LDO芯片：1)3μA超低静态电流的低功耗LDO芯片；2)无片外电容的LDO芯片；3)高电源噪声抑制的LDO芯片(PSRR=-70dB@1kHz)。测试结果验证了设计思想。在纳安级基准电流源的研究中,要分析了电源电压变化对基准电流的影响机制,提出一款三支路结构,有效地降低了电源噪声对基准电流的影响。并利用CSMC 0.6μm混合信号工艺中,不同电阻间温度系数的差别以及二极管反向电流的温度特性,在-40度到130度的温度范围内,将基准电流的精度控制在30±0.6nA。由于LDO芯片的输出极点具有106数量级的变化,有效的频率补偿方案就是产生一个随之变化的动态零点,从而实时的抵消掉输出极点对环路稳定性的不良影响。在本文中,提出了一种新型的有源受控电路生成电路,能有效地抑制传统有源受控电阻中低精度、受工艺涨落以及MOS管体效应影响较大等缺点；进而可以产生精确地受控零点。在该有源受控电阻基础上,分别实现了三种零点追踪频率补偿方案：1)基于带去零电阻的米勒电容；2)基于单位增益补偿模块；3)基于包含伪ESR电阻的功率级。由于LDO输出端电容对输出电压有滤波和稳压的作用,为了实现无片外电容LDO芯片的设计,对LDO大信号响应进行了系统的分析。在推导出LDO输出过冲电压和LDO输出端电容之间关系式的基础上,进一步明确了误差放大器摆率是抑制无片外电容LDO输出过冲电压的关键指标。为了继续保持LDO芯片低功耗的特性,决定采用摆率增强电路来提供动态电流,为功率管的栅电容进行充放电,进而优化LDO大信号响应过程,并相应的提出了4种电路实现方案。本文中的无片外电容LDO芯片设计中,采用了其中一款首创的“基于微分器结构的摆率增强电路”。该摆率增强电路的采用,使LDO输出过冲电压的峰值从VDD下降到VOUT+0.55V。闭环系统的电源噪声的系统研究是一个难点,至今尚未见详细报道。为了弥补这一空白,在本文中首先详细推导了6种中基本放大器的电源噪声传递函数,获得了多级放大器电源噪声抵消的设计理念,并提出了4种提高电源噪声抑制比的方案。在高电源噪声抑制LDO设计中,采用了第一级和第二级放大器电源噪声相互抵消的设计方案,并根据其电路结构和所需要的零极点分布,采用了“基于包含伪ESR电阻的功率级”的零极点追中频率补偿方案。最终在1kHz的频段内获得-70dB的电源噪声抑制特性。更多还原

【Abstract】 In the survey of Chinese power management IC (PMIC) markets from 2007 to 2009, the Low-Dropout Regulators (LDOs) is at the first place among all kinds of PMIC. The consumer electronics have a large and constant demand on LDOs, since LDOs can provide low noise supply voltage with less PCB area and less power consumption. Besides, the simple topology of LDOs makes them very suitable for the System on Chip (SoC) as an Intelligence Property (IP). But with the changing needs of the market and progress of the technologies, the requirements on LDOs’ performances become higher and higher. Less off-chip devices and high power supply rejection become the hot points of research and the development trend.At the first place, the key points of high performance LDOs have been analyzed through system design. Including:the nano-ampere reference current source, the frequency compensation methods, the large-signal response of LDO and the transfer function of supply noise in the closed-loop system. And then several novel circuits implementations have been proposed respectively to those theories:30nA reference current source,3 kinds of pole-zero tracking frequency compensation techniques based on a novel controllable active resistor,4 kinds of slew-rate enhancement circuits and 4 system implementations of high PSRR LDO based on noise cancellation techniques.Based such circuits’blocks, by using CMOS mixed-signal process, three high performance LDOs have been implemented. They are:1) An low power consumption LDO with 3μA quiescent current; 2) An LDO without off-chip load capacitor; 3) An LDO with high power supply rejection (PSRR=-70dB@1kHz). The chip testing results verify the design theory.In the research of nano ampere current reference, the mechanism of the impact on reference current from supply voltage’s variation has been analyzed. Thus a novel three branches current reference based on conventional one has been presented. With such topology, the effect from supply noise to the reference current has been depressed. Furthermore, by using the difference of temperature coefficients between two kinds of resistor in the CSMC mixed-signal process and inverse current of diode, the accuracy of reference has been limited within 30±0.6nA in the temperature range of -40 to 130 degree.Since the output pole of LDO can change about 106 times, the most efficient frequency compensation method is to generate a tracking zero, thus the harmful effect from changing output pole to the stability of the closed-loop can be eliminated. In the proposed thesis, a novel active controllable resistor has been presented. With such circuit, the equivalent resistor is more accurate and is less affected by the process variation and body effect.3 pole-zero tracking frequency compensation methods have been proposed base on such active controllable resistor:1) based on miller capacitor with nulling resistor; 2) based on unit gain compensation cell; 3) based on power stage with pseudo ESR.Since the off-chip load capacitor (CL) can filter and stabilize the output voltage, the large signal response of LDOs has been analyzed in order to implement an LDO without off-chip load capacitor. Based on the relationship between CL and overshot of output voltage, a deep analysis shows that the slew-rate of error amplifier is the bottle neck for achieving low overshot voltage. In order to maintain the low power consumption of LDOs, slew-rate enhancement (SRE) circuit has been used to provide extra dynamic current to charge/discharge the gate capacitor of the power transistor. In this way, the large-signal response of LDO has been optimized. In the proposed thesis, there are 4 kinds of circuit implementations for SRE circuits. And in the design of LDO without off-chip load capacitor, a novel SRE circuit based on differentiator has been used, and then the maximum value of overshot voltage drops from VDD to VOUT+0.55V.Although there are a lot of discussions about the power supply rejection (PSR) in the papers or the textbooks, a blank space is still there for the power supply noise in the closed-loop system. In order to fill such gap, the power supply noise transfer functions of 6 basic amplifier’s topology have been analyzed. Following the obtained theory of noise cancellation among cascaded amplifiers,4 methods have been presented to improve the power supply rejection. In the circuit’s implementation of high PSR LDO, a design plan of canceling the supply noise from first and second gain stage has been used. And according to its poles and zeroes distribution, a frequency compensation method based on pseudo ESR power stage has been introduced into the system. Finally the PSR of-70dB within 1kHz has been achieved.更多还原