【作者】 柴志雷；

【导师】 涂时亮；

【作者基本信息】 复旦大学 ， 计算机系统结构， 2006， 博士

【摘要】 近年来嵌入式系统发展极其迅速，正逐步渗透于人类生活的各个方面，这对嵌入式系统的性能及开发效率也提出了更高的要求。和桌面系统的软件开发相比，嵌入式软件开发普遍还使用比较传统的C／C++甚至汇编语言进行，难以适应嵌入式系统的迅猛发展，因此需要新的开发方法和开发手段来解决。Java语言的面向对象、跨平台、语言级并发支持、安全等特性不仅使它在互联网领域得到广泛应用，也引起了嵌入式领域研究人员的高度重视，他们希望能将Java语言改造成嵌入式及实时系统开发的主流语言来提高开发效率及增加系统安全性。由于嵌入式系统多数为实时系统，传统Java技术应用于嵌入式系统的主要不足之处表现为：由于Java虚拟机是在运行中对引用到的类进行动态装载、解析和连接，影响了系统的实时性；垃圾收集器(GC)的自动运行导致了任务执行时间的不可预测性；另外，Java语言规范和Java虚拟机规范讨论线程调度的地方非常笼统，导致在不同虚拟机实现中线程调度特性表现不一致。针对传统Java技术在实时方面的不足，Sun公司联合IBM、Microware等公司制定了实时Java规范(RTSJ)，为实时Java平台的实现提供了参考。实时Java规范在内存管理、线程调度、异步事件处理、异步控制转移等多个影响实时性的方面进行了扩展，使得Java能够适用于实时系统。随着实时Java规范的推出，如何实现适用于嵌入式系统的高效实时Java平台就成为了研究热点。目前，常见的实时Java平台实现方式有解释方式(在实时操作系统RTOS之上用软件方式来解释执行Java字节码)；提前编译(字节码被提前编译生成机器码或中间代码，如C)；硬件加速(用硬件方式执行一部分常用字节码来提高整体性能)；硬件翻译(用硬件单元把字节码实时翻译成机器码)以及Java处理器方式(字节码直接作为机器代码在处理器硬件上执行)。同其它实现方式相比，Java处理器免除了把Java字节码转换为机器代码的工作同时还可以针对Java虚拟机特点提供特殊的硬件支持。因此具有能够直接硬件执行Java字节码、执行效率高、内存占用少、功耗低等特点，所以更适合用于资源受限的嵌入式设备。目前国外已有一些针对嵌入式实时Java处理器的研究，如JOP、aJ-80、aJ-100及FemtoJava等。国内研究机构也有过一些针对Java处理器及Java芯片的研究，如JE-Java、JC104，但其重点是提高系统整体性能而不是实时性，一个原因也是因为当时实时Java规范尚未推出。本文设计了一种能在低成本FPGA芯片中实现的硬实时嵌入式Java处理器HRTEJ(Hard Real-Time Embedded Java Processor)，目标是实现具有硬实时特性的嵌入式Java处理器并对实时Java规范提供有效支持。该处理器实现了一些特殊的硬件机制提供对实时Java规范中异步传输控制、线程管理和调度、同步与共享、以及内存管理的支持。并通过对实时Java规范中内存管理的改进，简化了应用程序员的开发接口。同时，本文还提出了针对Java Class文件的优化方法，根据该优化方法，所有影响系统实时性的操作都在程序运行之前得到处理，在保证指令最坏执行时间(WCET)可预测性的同时也简化了处理器本身的实现。更多还原

【Abstract】 The complexity of embedded real-time systems keeps growing and novel methods and tools are required. Compared to software development for desktop systems, current software design practice for embedded systems is still archaic. C/C++ and even assembler are used on top of a small real-time operating system. Many of the advantages of Java, such as safe object references, the notion of concurrency as a first-class language construct, and its portability, have the potential to make embedded systems much safer and simpler to program. With the advantages mentioned above, Java is increasingly expected to become the leading programming language in embedded systems.Most of the embedded systems are real-time systems. Java technology is seldom used in embedded systems currently, due to the lack of acceptable real-time performance. To improve the real-time performance specified in the Java Language Specification and the Java Virtual Machine Specification, Greg Bollella et al propose the Real-Time Specification for Java (RTSJ). It provides a guideline for the implementation of real-time Java platform.Currently, to provide an efficient Java platform suitable for real-time applications, many different implementations are proposed. These implementations can be generally classified as Interpreter (an interpreting program running on the operating system that can interpret and execute java bytecode under the assistance of the OS), Ahead-of-Time Compiler (Java bytecode is compiled into native code or an intermediate language such as C in advance), and Java Processor (the Java platform is implemented directly on silicon) etc. Java processor not only avoids the overhead of translation of the bytecode to another processor’s native language, but also provides special support for Java runtime features such as stack processing, multithreading etc.Comparing with other implementing techniques, Java Processor is preferable in embedded systems for its high execution efficiency, low memory footprint and power consumption. Therefore, it becomes popular in implementing embedded real-time Java platforms. Presently, aJ-80/100 provides solution for employing Java technology into smart mobile devices and consumer appliances etc. The flexibility makes it a little too complex to implement. FemtoJava and JOP are simple to be implemented but do not put emphasis on supporting the RTSJ.In this paper, we propose a simple-structured Java processor suitable for embedded real-time applications (HRTEJ, Hard Real-Time Embedded Java Processor) and it is dedicated to supporting RTSJ features more efficiently. This processor implements RTSJ mechanisms such as asynchronous transfer of control (ATC), thread, synchronization, and memory management, and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. According to the optimization method proposed in our previous work[l], all the processing interfering predictability is handled before bytecode execution and this processor is simple to implement and its Worst Case Execution Time (WCET) is more predictable. Further advantage of this method is to make the implementation of the processor straightforward and suited to a low-cost FPGA chip.更多还原