【摘要】 二氧化硅由于具有良好的绝缘性能及稳定的硅/二氧化硅界面而长期用于硅集成电路的制备。然而对于纳米线宽的集成电路,需要寻找新的高介电常数(高k)的栅极介质材料代替二氧化硅,以保持一定的物理厚度和优良的耐压及漏电性能。这些栅极候选材料必须有较高的介电常数,合适的禁带宽度,高质量的表面形貌和热稳定性并与硅衬底间有良好界面。此外,其制备加工技术最好能与现行的硅集成电路工艺相兼容。本文从固体物理和材料科学理论出发,阐述选择高k栅介质材料的基本原则,介绍目前研究的材料体系、制备方法、材料性能以及界面稳定性,并展望了这些高k栅介质材料的应用前景。更多还原

【Abstract】 Because of its excellent insulation properties and the perfect SiO2/Si interface stability,SiO2 has been used as the gate dielectric in silicon technology since the advent of the integrated circuit in 1959.However,SiO2-based transistor technology is approaching fundamental limits for 45 nm integrated circuits and beyond,an alternative gate material having high dielectric constant(high k) is needed to replace the SiO2 with a physically thicker layer and tenable tunneling currents.Besides,these candidate materials should also have to meet other requirements such as relatively wide band-gap,conduction band offset and valence band offset,as well as suitable stability and perfect interface in contact with silicon.Particularly,it is highly desirable that the processing technology of high k dielectrics be compatible with the current silicon technology.This paper is aimed to bring insights on the latest developments and understanding of high k gate dielectrics from solid state physics and materials science point of view.It includes the fundamental device requirements,different categories of materials being developed,their process and properties.According to the current International Technology Roadmap for Semiconductors(ITRS),it is expected that the feature size of MOS devices will scale down to 14 nm by 2020.Thus,new high k dielectrics,gate metals and stable high k/semiconductor interface are needed.The application prospects of high k dielectrics are also highlighted.更多还原